diff options
| author | Scott Wood <scottwood@freescale.com> | 2014-05-20 20:26:01 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2014-05-22 18:08:30 -0500 |
| commit | aa80581da1448e9fe5ef3d1e56a82bbb21912ee1 (patch) | |
| tree | 27a970cd0521da7a957fa8e1fbfaefc73214054e /arch/powerpc/sysdev/mpic.c | |
| parent | 0c0fc4d3a955c0159a64b5eb66da70927d35513a (diff) | |
powerpc/mpic: Don't init the fsl error int until after mpic init
Besides other potential problems, if MPIC_NO_RESET is not set,
the error interrupt will be masked after it is requested.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/sysdev/mpic.c')
| -rw-r--r-- | arch/powerpc/sysdev/mpic.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 8209744b2829..be33c9768ea1 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -1588,10 +1588,6 @@ void __init mpic_init(struct mpic *mpic) num_timers = 8; } - /* FSL mpic error interrupt intialization */ - if (mpic->flags & MPIC_FSL_HAS_EIMR) - mpic_err_int_init(mpic, MPIC_FSL_ERR_INT); - /* Initialize timers to our reserved vectors and mask them for now */ for (i = 0; i < num_timers; i++) { unsigned int offset = mpic_tm_offset(mpic, i); @@ -1675,6 +1671,10 @@ void __init mpic_init(struct mpic *mpic) irq_set_chained_handler(virq, &mpic_cascade); } } + + /* FSL mpic error interrupt intialization */ + if (mpic->flags & MPIC_FSL_HAS_EIMR) + mpic_err_int_init(mpic, MPIC_FSL_ERR_INT); } void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio) |