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authorKyle Moffett <Kyle.D.Moffett@boeing.com>2011-12-02 06:28:01 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-12-07 13:43:07 +1100
commite7a98675caf272a11dc1012c7a8c6c00cab09f5b (patch)
tree856c69993207021ffda5550d3e12d88de7381e15 /arch/powerpc/sysdev/mpic.c
parent5bdb6f2e5833c1c3e5ea21a2050fe0fada3a4a1d (diff)
powerpc/mpic: Save computed phys_addr for board-specific code
The MPIC code can already perform an automatic OF address translation step as part of mpic_alloc(), but several boards need to use that base address when they perform mpic_assign_isu(). The easiest solution is to save the computed physical address into the "struct mpic" for later use by the board code. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/mpic.c')
-rw-r--r--arch/powerpc/sysdev/mpic.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 59564dcaab14..ef721c30f479 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1164,6 +1164,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
return NULL;
mpic->name = name;
+ mpic->paddr = phys_addr;
mpic->hc_irq = mpic_irq_chip;
mpic->hc_irq.name = name;
@@ -1250,8 +1251,8 @@ struct mpic * __init mpic_alloc(struct device_node *node,
#endif
/* Map the global registers */
- mpic_map(mpic, node, phys_addr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
- mpic_map(mpic, node, phys_addr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
+ mpic_map(mpic, node, mpic->paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
+ mpic_map(mpic, node, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
/* Reset */
@@ -1306,7 +1307,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
for_each_possible_cpu(i) {
unsigned int cpu = get_hard_smp_processor_id(i);
- mpic_map(mpic, node, phys_addr, &mpic->cpuregs[cpu],
+ mpic_map(mpic, node, mpic->paddr, &mpic->cpuregs[cpu],
MPIC_INFO(CPU_BASE) + cpu * MPIC_INFO(CPU_STRIDE),
0x1000);
}
@@ -1314,7 +1315,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
/* Initialize main ISU if none provided */
if (mpic->isu_size == 0) {
mpic->isu_size = mpic->num_sources;
- mpic_map(mpic, node, phys_addr, &mpic->isus[0],
+ mpic_map(mpic, node, mpic->paddr, &mpic->isus[0],
MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
}
mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
@@ -1346,7 +1347,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
}
printk(KERN_INFO "mpic: Setting up MPIC \"%s\" version %s at %llx,"
" max %d CPUs\n",
- name, vers, (unsigned long long)phys_addr, num_possible_cpus());
+ name, vers, (unsigned long long)mpic->paddr, num_possible_cpus());
printk(KERN_INFO "mpic: ISU size: %d, shift: %d, mask: %x\n",
mpic->isu_size, mpic->isu_shift, mpic->isu_mask);