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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2016-11-09 18:21:06 +0100
committerMax Krummenacher <max.krummenacher@toradex.com>2017-01-11 20:59:49 +0100
commitc233fa95f0e2e3491256847b26e019dbe18881eb (patch)
tree9497e901366dab7a53c04a35a21efbc66be943a9 /arch/powerpc
parentd97565599e341e9bda99c6ee109f8a66bd28cd24 (diff)
apalis_t30: fix pcie clock and reset not conforming to specification
Fix PCIe clock and reset not conforming to specification by moving PCIe reset handling including the PLX PEX 8605 errata 5 workaround from the board platform data into the right places timing wise in the PCIe driver itself. Also add a kernel command line argument to allow using the Apalis GPIO7 as a regular GPIO rather than for above mentioned PLX PEX 8605 workaround: pex_perst=0 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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