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authorMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>2014-10-07 15:55:33 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2014-10-10 17:25:25 +1100
commitc675c7db629bd1abf4a9a36c0200686716eeea05 (patch)
tree63d4d6201c1362a95b5ea9dcc153c60d7b1ec878 /arch/powerpc
parent1028ccf560b97adbf272381a61a67e17d44d1054 (diff)
powerpc/book3s: Don't clear MSR_RI in hmi handler.
In HMI interrupt handler we don't touch SRR0/SRR1, instead we touch HSRR0/HSRR1. Hence we don't need to clear MSR_RI bit. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 050f79a4a168..72e783ea0681 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1270,11 +1270,6 @@ hmi_exception_early:
addi r3,r1,STACK_FRAME_OVERHEAD
bl hmi_exception_realmode
/* Windup the stack. */
- /* Clear MSR_RI before setting SRR0 and SRR1. */
- li r0,MSR_RI
- mfmsr r9 /* get MSR value */
- andc r9,r9,r0
- mtmsrd r9,1 /* Clear MSR_RI */
/* Move original HSRR0 and HSRR1 into the respective regs */
ld r9,_MSR(r1)
mtspr SPRN_HSRR1,r9