diff options
| author | Vitaly Bordug <vbordug@ru.mvista.com> | 2006-04-25 20:26:43 +0400 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-04-28 21:11:30 +1000 |
| commit | 4427d6bf966379304f77b7cc8c92421e6bb95483 (patch) | |
| tree | 9e881bd2123850d86d792c66bb94991ac11ecccd /arch/ppc/platforms/pq2ads.c | |
| parent | e27987cddd8db3a72a0f4734b5d94d06c7677323 (diff) | |
[PATCH] ppc32: Update board-specific code of the CPM UART users
This has the relevant updates/additions to the BSP code so that proper
platform_info struct well be passed to the CPM UART drivers. The changes
covered mpc866ads, mpc885ads and mpc8272ads.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/platforms/pq2ads.c')
| -rw-r--r-- | arch/ppc/platforms/pq2ads.c | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/arch/ppc/platforms/pq2ads.c b/arch/ppc/platforms/pq2ads.c index 3365fd788a7a..7fc2e02f5246 100644 --- a/arch/ppc/platforms/pq2ads.c +++ b/arch/ppc/platforms/pq2ads.c @@ -14,11 +14,40 @@ #include <linux/init.h> +#include <asm/io.h> #include <asm/mpc8260.h> +#include <asm/cpm2.h> +#include <asm/immap_cpm2.h> void __init m82xx_board_setup(void) { + cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); + u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32)); + /* Enable the 2nd UART port */ - *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_RS232_EN2; + clrbits32(bcsr, BCSR1_RS232_EN2); + +#ifdef CONFIG_SERIAL_CPM_SCC1 + clrbits32((u32*)&immap->im_scc[0].scc_sccm, UART_SCCM_TX | UART_SCCM_RX); + clrbits32((u32*)&immap->im_scc[0].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); +#endif + +#ifdef CONFIG_SERIAL_CPM_SCC2 + clrbits32((u32*)&immap->im_scc[1].scc_sccm, UART_SCCM_TX | UART_SCCM_RX); + clrbits32((u32*)&immap->im_scc[1].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); +#endif + +#ifdef CONFIG_SERIAL_CPM_SCC3 + clrbits32((u32*)&immap->im_scc[2].scc_sccm, UART_SCCM_TX | UART_SCCM_RX); + clrbits32((u32*)&immap->im_scc[2].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); +#endif + +#ifdef CONFIG_SERIAL_CPM_SCC4 + clrbits32((u32*)&immap->im_scc[3].scc_sccm, UART_SCCM_TX | UART_SCCM_RX); + clrbits32((u32*)&immap->im_scc[3].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); +#endif + + iounmap(bcsr); + iounmap(immap); } |