diff options
author | Eugene Surovegin <ebs@ebshome.net> | 2006-04-25 01:22:44 -0700 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-04-28 21:04:56 +1000 |
commit | 30aacebed0f0619f23ce84df7c59ad033ca08d77 (patch) | |
tree | fb32292e6804fdab515227a0b7d9722e9595d532 /arch/ppc/platforms | |
parent | 1269277a5e7c6d7ae1852e648a8bcdb78035e9fa (diff) |
[PATCH] ppc32: add 440GX erratum 440_43 workaround
This patch adds workaround for PPC 440GX erratum 440_43. According to
this erratum spurious MachineChecks (caused by L1 cache parity) can
happen during DataTLB miss processing. We disable L1 cache parity
checking for 440GX rev.C and rev.F
Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/platforms')
-rw-r--r-- | arch/ppc/platforms/4xx/ocotea.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c index f841972f1fa9..554776d4b8ac 100644 --- a/arch/ppc/platforms/4xx/ocotea.c +++ b/arch/ppc/platforms/4xx/ocotea.c @@ -331,7 +331,7 @@ static void __init ocotea_init(void) void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { - ibm44x_platform_init(r3, r4, r5, r6, r7); + ibm440gx_platform_init(r3, r4, r5, r6, r7); ppc_md.setup_arch = ocotea_setup_arch; ppc_md.show_cpuinfo = ocotea_show_cpuinfo; |