diff options
author | Kumar Gala <galak@gate.crashing.org> | 2005-11-14 12:54:33 -0600 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-01-09 14:48:57 +1100 |
commit | 1cd8e506209223ed10da805d99be55e268f4023c (patch) | |
tree | ccec0c8aff4f351baebad5dcc213915c3379ca6e /arch/ppc/syslib/ipic.h | |
parent | 3d1229d6ae92ed1994f4411b8493327ef8f4b76f (diff) |
[PATCH] powerpc: moved ipic code to arch/powerpc
Moved 83xx and QUICC Engine interrupt handling code into arch/powerpc
as a precursor of getting 83xx sub-arch building in arch/powerpc.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/syslib/ipic.h')
-rw-r--r-- | arch/ppc/syslib/ipic.h | 49 |
1 files changed, 0 insertions, 49 deletions
diff --git a/arch/ppc/syslib/ipic.h b/arch/ppc/syslib/ipic.h deleted file mode 100644 index a7ce7da8785c..000000000000 --- a/arch/ppc/syslib/ipic.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * arch/ppc/kernel/ipic.h - * - * IPIC private definitions and structure. - * - * Maintainer: Kumar Gala <galak@kernel.crashing.org> - * - * Copyright 2005 Freescale Semiconductor, Inc - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef __IPIC_H__ -#define __IPIC_H__ - -#include <asm/ipic.h> - -#define MPC83xx_IPIC_SIZE (0x00100) - -/* System Global Interrupt Configuration Register */ -#define SICFR_IPSA 0x00010000 -#define SICFR_IPSD 0x00080000 -#define SICFR_MPSA 0x00200000 -#define SICFR_MPSB 0x00400000 - -/* System External Interrupt Mask Register */ -#define SEMSR_SIRQ0 0x00008000 - -/* System Error Control Register */ -#define SERCR_MCPR 0x00000001 - -struct ipic { - volatile u32 __iomem *regs; - unsigned int irq_offset; -}; - -struct ipic_info { - u8 pend; /* pending register offset from base */ - u8 mask; /* mask register offset from base */ - u8 prio; /* priority register offset from base */ - u8 force; /* force register offset from base */ - u8 bit; /* register bit position (as per doc) - bit mask = 1 << (31 - bit) */ - u8 prio_mask; /* priority mask value */ -}; - -#endif /* __IPIC_H__ */ |