diff options
author | Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com> | 2007-04-26 11:51:00 +0900 |
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committer | Paul Mundt <lethal@hera.kernel.org> | 2007-05-07 02:11:56 +0000 |
commit | 2a8ff4596cde3ec2a51980288ebb28a0d196d19a (patch) | |
tree | a895745a2a0bf676a6740c0529175cf430dee489 /arch/sh/boards/se/770x/irq.c | |
parent | 005a336e71e9e3ea356f9afca5d66318d6901319 (diff) |
sh: Solution Engine SH7705 board and CPU updates.
This fixes up SH7705 CPU support and the SE7705 board
for some of the recent changes.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/se/770x/irq.c')
-rw-r--r-- | arch/sh/boards/se/770x/irq.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c index 59cdffa13964..c8eccff77a04 100644 --- a/arch/sh/boards/se/770x/irq.c +++ b/arch/sh/boards/se/770x/irq.c @@ -65,24 +65,24 @@ static struct ipr_data se770x_ipr_map[] = { * 8: rtc * 12: mouse * 14: ide0 - */ + */ #if defined(CONFIG_CPU_SUBTYPE_SH7705) /* This is default value */ - { 0xf-0x2, 0, 8, 0x2 , BCR_ILCRA}, - { 0xf-0xa, 0, 4, 0xa , BCR_ILCRA}, - { 0xf-0x5, 0, 0, 0x5 , BCR_ILCRB}, - { 0xf-0x8, 0, 4, 0x8 , BCR_ILCRC}, - { 0xf-0xc, 0, 0, 0xc , BCR_ILCRC}, - { 0xf-0xe, 0, 12, 0xe , BCR_ILCRD}, - { 0xf-0x3, 0, 4, 0x3 , BCR_ILCRD}, /* LAN */ - { 0xf-0xd, 0, 8, 0xd , BCR_ILCRE}, - { 0xf-0x9, 0, 4, 0x9 , BCR_ILCRE}, - { 0xf-0x1, 0, 0, 0x1 , BCR_ILCRE}, - { 0xf-0xf, 0, 12, 0xf , BCR_ILCRF}, - { 0xf-0xb, 0, 4, 0xb , BCR_ILCRF}, - { 0xf-0x7, 0, 12, 0x7 , BCR_ILCRG}, - { 0xf-0x6, 0, 8, 0x6 , BCR_ILCRG}, - { 0xf-0x4, 0, 4, 0x4 , BCR_ILCRG}, + { 13, 0, 8, 0x0f-13 ,BCR_ILCRA}, + { 5 , 0, 4, 0x0f- 5 ,BCR_ILCRA}, + { 10, 0, 0, 0x0f-10, BCR_ILCRB}, + { 7 , 0, 4, 0x0f- 7, BCR_ILCRC}, + { 3 , 0, 0, 0x0f- 3, BCR_ILCRC}, + { 1 , 0, 12, 0x0f- 1, BCR_ILCRD}, + { 12, 0, 4, 0x0f-12, BCR_ILCRD}, /* LAN */ + { 2 , 0, 8, 0x0f- 2, BCR_ILCRE}, /* PCIRQ2 */ + { 6 , 0, 4, 0x0f- 6, BCR_ILCRE}, /* PCIRQ1 */ + { 14, 0, 0, 0x0f-14, BCR_ILCRE}, /* PCIRQ0 */ + { 0 , 0, 12, 0x0f , BCR_ILCRF}, + { 4 , 0, 4, 0x0f- 4, BCR_ILCRF}, + { 8 , 0, 12, 0x0f- 8, BCR_ILCRG}, + { 9 , 0, 8, 0x0f- 9, BCR_ILCRG}, + { 11, 0, 4, 0x0f-11, BCR_ILCRG}, #else { 14, 0, 8, 0x0f-14 ,BCR_ILCRA}, { 12, 0, 4, 0x0f-12 ,BCR_ILCRA}, |