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authorSuzuki K Poulose <suzuki.poulose@arm.com>2018-07-04 23:07:46 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-09-15 09:43:07 +0200
commit67badb25211c374d5c5bbac5f72678c9410dcfd1 (patch)
tree485dc1ec455b41e8b9e00086378266ad911b323d /arch/sh/boot
parenta6830095680b0161a0dc47c67d14160f79479ed3 (diff)
arm64: Handle mismatched cache type
commit 314d53d297980676011e6fd83dac60db4a01dc70 upstream. Track mismatches in the cache type register (CTR_EL0), other than the D/I min line sizes and trap user accesses if there are any. Fixes: be68a8aaf925 ("arm64: cpufeature: Fix CTR_EL0 field definitions") Cc: <stable@vger.kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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