diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-23 09:00:40 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-23 09:00:40 -0700 |
commit | 1d767cae4dbd4116fc3b2cc3251a20760f98339f (patch) | |
tree | 79a1a48a67a9b4296ce062d61ee863fe7a46c77f /arch/sh/include/asm/traps_64.h | |
parent | 6101167727932a929e37fb8a6eeb68bdbf54d58e (diff) | |
parent | 5f19f14fed7786652b9617c633db101d26a42251 (diff) |
Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh
Pull SuperH updates from Paul Mundt:
- New CPUs: SH7734 (SH-4A), SH7264 and SH7269 (SH-2A)
- New boards: RSK2+SH7264, RSK2+SH7269
- Unbreaking kgdb for SMP
- Consolidation of _32/_64 page fault handling.
- watchdog and legacy DMA chainsawing, part 1
- Conversion to evt2irq() hwirq lookup, to support relocation of
vectored IRQs for irqdomains.
* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh: (98 commits)
sh: intc: Kill off special reservation interface.
sh: Enable PIO API for hp6xx and se770x.
sh: Kill off machvec IRQ hinting.
sh: dma: More legacy cpu dma chainsawing.
sh: Kill off MAX_DMA_ADDRESS leftovers.
sh: Tidy up some of the cpu legacy dma header mess.
sh: Move sh4a dma header from cpu-sh4 to cpu-sh4a.
sh64: Fix up vmalloc fault range check.
Revert "sh: Ensure fixmap and store queue space can co-exist."
serial: sh-sci: Fix for port types without BRI interrupts.
sh: legacy PCI evt2irq migration.
sh: cpu dma evt2irq migration.
sh: sh7763rdp evt2irq migration.
sh: sdk7780 evt2irq migration.
sh: migor evt2irq migration.
sh: landisk evt2irq migration.
sh: kfr2r09 evt2irq migration.
sh: ecovec24 evt2irq migration.
sh: ap325rxa evt2irq migration.
sh: urquell evt2irq migration.
...
Diffstat (limited to 'arch/sh/include/asm/traps_64.h')
-rw-r--r-- | arch/sh/include/asm/traps_64.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/sh/include/asm/traps_64.h b/arch/sh/include/asm/traps_64.h index c52d7f9a06c1..ef5eff919449 100644 --- a/arch/sh/include/asm/traps_64.h +++ b/arch/sh/include/asm/traps_64.h @@ -10,8 +10,22 @@ #ifndef __ASM_SH_TRAPS_64_H #define __ASM_SH_TRAPS_64_H +#include <cpu/registers.h> + extern void phys_stext(void); +#define lookup_exception_vector() \ +({ \ + unsigned long _vec; \ + \ + __asm__ __volatile__ ( \ + "getcon " __EXPEVT ", %0\n\t" \ + : "=r" (_vec) \ + ); \ + \ + _vec; \ +}) + static inline void trigger_address_error(void) { phys_stext(); |