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| author | Ingo Molnar <mingo@kernel.org> | 2014-03-11 11:53:50 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2014-03-11 11:53:50 +0100 |
| commit | 0066f3b93e144762b409940fa37bb1cd36c1baf7 (patch) | |
| tree | 0c99b2754fb16c2a787bc1d086bd6fb268b12b1a /arch/sh/include/cpu-sh3/cpu/cache.h | |
| parent | e65312fe868da53077780de618e213a53dc90d00 (diff) | |
| parent | b8ad0f912b93c23c34dfedc615a0eeba6ca29463 (diff) | |
Merge branch 'perf/urgent' into perf/core
Merge the latest fixes.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/sh/include/cpu-sh3/cpu/cache.h')
| -rw-r--r-- | arch/sh/include/cpu-sh3/cpu/cache.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/include/cpu-sh3/cpu/cache.h b/arch/sh/include/cpu-sh3/cpu/cache.h index bee2d81c56bf..29700fd88c75 100644 --- a/arch/sh/include/cpu-sh3/cpu/cache.h +++ b/arch/sh/include/cpu-sh3/cpu/cache.h @@ -17,7 +17,7 @@ #define SH_CACHE_COMBINED 4 #define SH_CACHE_ASSOC 8 -#define CCR 0xffffffec /* Address of Cache Control Register */ +#define SH_CCR 0xffffffec /* Address of Cache Control Register */ #define CCR_CACHE_CE 0x01 /* Cache Enable */ #define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */ |