diff options
| author | Daniel Hellstrom <daniel@gaisler.com> | 2011-05-02 00:08:51 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2011-05-16 13:07:43 -0700 |
| commit | d6d048192b1d22cb8f09da0cc936095ec2cb969c (patch) | |
| tree | 1fcb2aac7a706074a59c329a2e25cac5cc171255 /arch/sparc/kernel/irq_32.c | |
| parent | 2645e7219e88d1e2ab8b2939537bce36e6db9e8c (diff) | |
sparc32: implement SMP IPIs using the generic functions
The current sparc32 SMP IPI generation is implemented the
cross call function. The cross call function uses IRQ15 the
NMI, this is has the effect that IPIs will interrupt IRQ
critical areas and hang the system. Typically on/after
spin_lock_irqsave calls can be aborted.
The cross call functionality must still exist to flush
cache/TLBS.
This patch provides CPU models a custom way to implement
generation of IPIs on the generic code's request. The
typical approach is to generate an IRQ for each IPI case.
After this patch each sparc32 SMP CPU model needs to
implement IPIs in order to function properly.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/irq_32.c')
| -rw-r--r-- | arch/sparc/kernel/irq_32.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/sparc/kernel/irq_32.c b/arch/sparc/kernel/irq_32.c index 197e1ba85484..9b89d842913c 100644 --- a/arch/sparc/kernel/irq_32.c +++ b/arch/sparc/kernel/irq_32.c @@ -206,6 +206,16 @@ int arch_show_interrupts(struct seq_file *p, int prec) { int j; +#ifdef CONFIG_SMP + seq_printf(p, "RES: "); + for_each_online_cpu(j) + seq_printf(p, "%10u ", cpu_data(j).irq_resched_count); + seq_printf(p, " IPI rescheduling interrupts\n"); + seq_printf(p, "CAL: "); + for_each_online_cpu(j) + seq_printf(p, "%10u ", cpu_data(j).irq_call_count); + seq_printf(p, " IPI function call interrupts\n"); +#endif seq_printf(p, "NMI: "); for_each_online_cpu(j) seq_printf(p, "%10u ", cpu_data(j).counter); |