[SPARC64]: TSB refinements.

Move {init_new,destroy}_context() out of line.

Do not put huge pages into the TSB, only base page size translations.
There are some clever things we could do here, but for now let's be
correct instead of fancy.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 28 insertions, 0 deletions

diff --git a/arch/sparc64/mm/tsb.c b/arch/sparc64/mm/tsb.c
index 15e8af58b1d2..2f84cef6c1b5 100644
--- a/arch/sparc64/mm/tsb.c
+++ b/arch/sparc64/mm/tsb.c
@@ -8,6 +8,7 @@
 #include <asm/page.h>
 #include <asm/tlbflush.h>
 #include <asm/tlb.h>
+#include <asm/mmu_context.h>
 
 #define TSB_ENTRY_ALIGNMENT	16
 
@@ -82,3 +83,30 @@ void flush_tsb_user(struct mmu_gather *mp)
 		}
 	}
 }
+
+int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
+{
+	unsigned long page = get_zeroed_page(GFP_KERNEL);
+
+	mm->context.sparc64_ctx_val = 0UL;
+	if (unlikely(!page))
+		return -ENOMEM;
+
+	mm->context.sparc64_tsb = (unsigned long *) page;
+
+	return 0;
+}
+
+void destroy_context(struct mm_struct *mm)
+{
+	free_page((unsigned long) mm->context.sparc64_tsb);
+
+	spin_lock(&ctx_alloc_lock);
+
+	if (CTX_VALID(mm->context)) {
+		unsigned long nr = CTX_NRBITS(mm->context);
+		mmu_context_bmap[nr>>6] &= ~(1UL << (nr & 63));
+	}
+
+	spin_unlock(&ctx_alloc_lock);
+}