diff options
| author | Chris Metcalf <cmetcalf@tilera.com> | 2010-06-25 16:41:11 -0400 |
|---|---|---|
| committer | Chris Metcalf <cmetcalf@tilera.com> | 2010-07-06 13:34:01 -0400 |
| commit | fb702b942bf638baa6cbbbda9f76794db62921ef (patch) | |
| tree | c065b0ab61cbb80b6209c725836a6864624b3c46 /arch/tile/include/arch | |
| parent | de5d9bf6541736dc7ad264d2b5cc99bc1b2ad958 (diff) | |
arch/tile: Enable more sophisticated IRQ model for 32-bit chips.
This model is based on the on-chip interrupt model used by the
TILE-Gx next-generation hardware, and interacts much more cleanly
with the Linux generic IRQ layer.
The change includes modifications to the Tilera hypervisor, which
are reflected in the hypervisor headers in arch/tile/include/arch/.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/tile/include/arch')
| -rw-r--r-- | arch/tile/include/arch/chip_tile64.h | 3 | ||||
| -rw-r--r-- | arch/tile/include/arch/chip_tilepro.h | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/tile/include/arch/chip_tile64.h b/arch/tile/include/arch/chip_tile64.h index 18b5bc8e563f..1246573be59e 100644 --- a/arch/tile/include/arch/chip_tile64.h +++ b/arch/tile/include/arch/chip_tile64.h @@ -248,5 +248,8 @@ /** Does the chip support rev1 DMA packets? */ #define CHIP_HAS_REV1_DMA_PACKETS() 0 +/** Does the chip have an IPI shim? */ +#define CHIP_HAS_IPI() 0 + #endif /* !__OPEN_SOURCE__ */ #endif /* __ARCH_CHIP_H__ */ diff --git a/arch/tile/include/arch/chip_tilepro.h b/arch/tile/include/arch/chip_tilepro.h index 9852af163862..e864c47fc89c 100644 --- a/arch/tile/include/arch/chip_tilepro.h +++ b/arch/tile/include/arch/chip_tilepro.h @@ -248,5 +248,8 @@ /** Does the chip support rev1 DMA packets? */ #define CHIP_HAS_REV1_DMA_PACKETS() 1 +/** Does the chip have an IPI shim? */ +#define CHIP_HAS_IPI() 0 + #endif /* !__OPEN_SOURCE__ */ #endif /* __ARCH_CHIP_H__ */ |