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| author | Thomas Gleixner <tglx@linutronix.de> | 2011-05-14 12:06:36 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2011-05-14 12:06:36 +0200 |
| commit | a18f22a968de17b29f2310cdb7ba69163e65ec15 (patch) | |
| tree | a7d56d88fad5e444d7661484109758a2f436129e /arch/tile/kernel/head_32.S | |
| parent | a1c57e0fec53defe745e64417eacdbd3618c3e66 (diff) | |
| parent | 798778b8653f64b7b2162ac70eca10367cff6ce8 (diff) | |
Merge branch 'consolidate-clksrc-i8253' of master.kernel.org:~rmk/linux-2.6-arm into timers/clocksource
Conflicts:
arch/ia64/kernel/cyclone.c
arch/mips/kernel/i8253.c
arch/x86/kernel/i8253.c
Reason: Resolve conflicts so further cleanups do not conflict further
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/tile/kernel/head_32.S')
| -rw-r--r-- | arch/tile/kernel/head_32.S | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/tile/kernel/head_32.S b/arch/tile/kernel/head_32.S index 90e7c4435693..1a39b7c1c87e 100644 --- a/arch/tile/kernel/head_32.S +++ b/arch/tile/kernel/head_32.S @@ -133,7 +133,7 @@ ENTRY(_start) } ENDPROC(_start) -.section ".bss.page_aligned","w" +__PAGE_ALIGNED_BSS .align PAGE_SIZE ENTRY(empty_zero_page) .fill PAGE_SIZE,1,0 @@ -145,10 +145,10 @@ ENTRY(empty_zero_page) .endif .word HV_PTE_PAGE | HV_PTE_DIRTY | HV_PTE_PRESENT | HV_PTE_ACCESSED | \ (HV_PTE_MODE_CACHE_NO_L3 << HV_PTE_INDEX_MODE) - .word (\bits1) | (HV_CPA_TO_PFN(\cpa) << HV_PTE_INDEX_PFN) + .word (\bits1) | (HV_CPA_TO_PFN(\cpa) << (HV_PTE_INDEX_PFN - 32)) .endm -.section ".data.page_aligned","wa" +__PAGE_ALIGNED_DATA .align PAGE_SIZE ENTRY(swapper_pg_dir) /* @@ -158,12 +158,14 @@ ENTRY(swapper_pg_dir) */ .set addr, 0 .rept (MEM_USER_INTRPT - PAGE_OFFSET) >> PGDIR_SHIFT - PTE addr + PAGE_OFFSET, addr, HV_PTE_READABLE | HV_PTE_WRITABLE + PTE addr + PAGE_OFFSET, addr, (1 << (HV_PTE_INDEX_READABLE - 32)) | \ + (1 << (HV_PTE_INDEX_WRITABLE - 32)) .set addr, addr + PGDIR_SIZE .endr /* The true text VAs are mapped as VA = PA + MEM_SV_INTRPT */ - PTE MEM_SV_INTRPT, 0, HV_PTE_READABLE | HV_PTE_EXECUTABLE + PTE MEM_SV_INTRPT, 0, (1 << (HV_PTE_INDEX_READABLE - 32)) | \ + (1 << (HV_PTE_INDEX_EXECUTABLE - 32)) .org swapper_pg_dir + HV_L1_SIZE END(swapper_pg_dir) @@ -176,6 +178,7 @@ ENTRY(swapper_pg_dir) __INITDATA .align CHIP_L2_LINE_SIZE() ENTRY(swapper_pgprot) - PTE 0, 0, HV_PTE_READABLE | HV_PTE_WRITABLE, 1 + PTE 0, 0, (1 << (HV_PTE_INDEX_READABLE - 32)) | \ + (1 << (HV_PTE_INDEX_WRITABLE - 32)), 1 .align CHIP_L2_LINE_SIZE() END(swapper_pgprot) |