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authorChris Metcalf <cmetcalf@tilera.com>2012-07-18 12:06:19 -0400
committerChris Metcalf <cmetcalf@tilera.com>2012-07-18 16:54:16 -0400
commitf6d2ce00da145ae31ec22d21daca6ca5e22b3c84 (patch)
treebb030290bc253b37bfad91de618c6f080f0b0af9 /arch/tile/kernel/setup.c
parentf1006257893917dfb1e0d74cb47b18c0e2908693 (diff)
tile: updates to pci root complex from community feedback
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel/setup.c')
-rw-r--r--arch/tile/kernel/setup.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index 2b8b689e596d..6a649a4462d3 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -1536,8 +1536,7 @@ static struct resource code_resource = {
/*
* On Pro, we reserve all resources above 4GB so that PCI won't try to put
- * mappings above 4GB; the standard allows that for some devices but
- * the probing code trunates values to 32 bits.
+ * mappings above 4GB.
*/
#if defined(CONFIG_PCI) && !defined(__tilegx__)
static struct resource* __init
@@ -1584,7 +1583,6 @@ static int __init request_standard_resources(void)
int i;
enum { CODE_DELTA = MEM_SV_INTRPT - PAGE_OFFSET };
- iomem_resource.end = -1LL;
#if defined(CONFIG_PCI) && !defined(__tilegx__)
insert_non_bus_resource();
#endif