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authorChris Zankel <chris@zankel.net>2014-01-28 22:09:51 -0800
committerChris Zankel <chris@zankel.net>2014-01-29 13:47:26 -0800
commitc0e50d41126e4786d9cf1105bdf783e55c99f915 (patch)
treea4b3b7cfe0e0d8fe23008b5c44a5d4ff43081738 /arch/x86/include/asm/intel-mid.h
parent6b5a1f74e50170e64104135490dc32b657483594 (diff)
xtensa: fix fast_syscall_spill_registers
The original implementation could clobber registers under certain conditions. The Xtensa processor architecture uses windowed registers and the original implementation was using a4 as a temporary register, which under certain conditions could be register a0 of the oldest window frame, and didn't always restore the content correctly. By moving the _spill_registers routine inside the fast system call, it frees up one more register (the return address is not required anymore) for the spill routine. Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/x86/include/asm/intel-mid.h')
0 files changed, 0 insertions, 0 deletions