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authorTomasz Nowicki <tomasz.nowicki@linaro.org>2014-07-22 11:20:13 +0200
committerTony Luck <tony.luck@intel.com>2014-07-22 15:05:06 -0700
commit594c7255dce7a13cac50cf2470cc56e2c3b0494e (patch)
tree057da64928a17b6e13e923ec2baad9181886c704 /arch/x86/kernel/acpi
parent44a69f6195628f6f940566d133a72987559e102d (diff)
acpi, apei, ghes: Factor out ioremap virtual memory for IRQ and NMI context.
GHES currently maps two pages with atomic_ioremap. From now on, NMI is architectural depended so there is no need to allocate an NMI page for platforms without NMI support. To make it possible to not use a second page, swap the existing page order so that the IRQ context page is first, and the optional NMI context page is second. Then, use HAVE_ACPI_APEI_NMI to decide how many pages are to be allocated. Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/x86/kernel/acpi')
-rw-r--r--arch/x86/kernel/acpi/apei.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
index 12b13de55255..c280df6b2aa2 100644
--- a/arch/x86/kernel/acpi/apei.c
+++ b/arch/x86/kernel/acpi/apei.c
@@ -15,6 +15,7 @@
#include <acpi/apei.h>
#include <asm/mce.h>
+#include <asm/tlbflush.h>
int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)
{
@@ -54,3 +55,8 @@ void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
apei_mce_report_mem_error(sev, mem_err);
#endif
}
+
+void arch_apei_flush_tlb_one(unsigned long addr)
+{
+ __flush_tlb_one(addr);
+}