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authorIngo Molnar <mingo@elte.hu>2009-01-28 06:50:47 +0100
committerIngo Molnar <mingo@elte.hu>2009-01-28 23:20:20 +0100
commite2d40b1878bd13ca1028ddd299c48e4821ac3535 (patch)
tree6b2a69b3323346137e7146537edd1118dcce7862 /arch/x86/mach-generic/default.c
parent2e867b17cc02e1799f18126af0ddd7b63dd8f6f4 (diff)
x86, apic: clean up ->vector_allocation_domain()
- separate the namespace - remove macros - move the default vector-allocation-domain to mach-generic - fix whitespace damage Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/mach-generic/default.c')
-rw-r--r--arch/x86/mach-generic/default.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
index e89e8c9dd68d..6adc3c69a3c9 100644
--- a/arch/x86/mach-generic/default.c
+++ b/arch/x86/mach-generic/default.c
@@ -18,6 +18,20 @@
#include <asm/mach-default/mach_mpparse.h>
#include <asm/mach-default/mach_wakecpu.h>
+static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
+{
+ /*
+ * Careful. Some cpus do not strictly honor the set of cpus
+ * specified in the interrupt destination when using lowest
+ * priority interrupt delivery mode.
+ *
+ * In particular there was a hyperthreading cpu observed to
+ * deliver interrupts to the wrong hyperthread when only one
+ * hyperthread was specified in the interrupt desitination.
+ */
+ *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
+}
+
/* should be called last. */
static int probe_default(void)
{
@@ -41,7 +55,7 @@ struct genapic apic_default = {
.check_apicid_used = default_check_apicid_used,
.check_apicid_present = default_check_apicid_present,
- .vector_allocation_domain = vector_allocation_domain,
+ .vector_allocation_domain = default_vector_allocation_domain,
.init_apic_ldr = init_apic_ldr,
.ioapic_phys_id_map = ioapic_phys_id_map,