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authorAl Viro <viro@zeniv.linux.org.uk>2012-11-16 22:27:58 -0500
committerAl Viro <viro@zeniv.linux.org.uk>2012-11-16 22:27:58 -0500
commitd05f06e60df4f56a70fb8a3e46335b40687169e9 (patch)
treec1eec6749fed86a21b08606e1e4acefe4b033253 /arch/xtensa/include/asm/tlbflush.h
parent0af1c5300db31f25a412e6e83d42b1747d56c9de (diff)
parent1d72d9f83df057e71c7951def41138a0230bf737 (diff)
Merge branch 'arch-frv' into no-rebases
Diffstat (limited to 'arch/xtensa/include/asm/tlbflush.h')
-rw-r--r--arch/xtensa/include/asm/tlbflush.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/xtensa/include/asm/tlbflush.h b/arch/xtensa/include/asm/tlbflush.h
index 46d240074f74..43dd348a5a47 100644
--- a/arch/xtensa/include/asm/tlbflush.h
+++ b/arch/xtensa/include/asm/tlbflush.h
@@ -86,26 +86,26 @@ static inline void invalidate_dtlb_entry_no_isync (unsigned entry)
static inline void set_itlbcfg_register (unsigned long val)
{
- __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t"
+ __asm__ __volatile__("wsr %0, itlbcfg\n\t" "isync\n\t"
: : "a" (val));
}
static inline void set_dtlbcfg_register (unsigned long val)
{
- __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t"
+ __asm__ __volatile__("wsr %0, dtlbcfg; dsync\n\t"
: : "a" (val));
}
static inline void set_ptevaddr_register (unsigned long val)
{
- __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n"
+ __asm__ __volatile__(" wsr %0, ptevaddr; isync\n"
: : "a" (val));
}
static inline unsigned long read_ptevaddr_register (void)
{
unsigned long tmp;
- __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp));
+ __asm__ __volatile__("rsr %0, ptevaddr\n\t" : "=a" (tmp));
return tmp;
}