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authorBjorn Helgaas <bjorn.helgaas@hp.com>2006-10-12 16:20:59 -0600
committerTony Luck <tony.luck@intel.com>2006-10-17 14:53:52 -0700
commitc12fb1885787dcc2e20c4b88149e1e607e1293b2 (patch)
treeb607d2cf6e4915b5005a2c98a7efea0742103e28 /arch
parentaccaddb27a2d544e38e10ff2a2782b33bbbad913 (diff)
[IA64] remove unused PAL_CALL_IC_OFF
Linux maps PAL instructions with an ITR, but uses a DTC for PAL data. Section 11.10.2.1.3, "Making PAL Procedures Calls in Physical or Virtual Mode," of the SDM (rev 2.2), says we must therefore make all PAL calls with PSR.ic = 1 so that Linux can handle any TLB faults. PAL_CALL_IC_OFF is currently unused, and as long as we use the ITR + DTC strategy, we can't use it. So remove it. I also removed the code in ia64_pal_call_static() that conditionally cleared PSR.ic. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/ia64/kernel/pal.S11
1 files changed, 3 insertions, 8 deletions
diff --git a/arch/ia64/kernel/pal.S b/arch/ia64/kernel/pal.S
index ebaf1e685f5e..5f50e6bbc686 100644
--- a/arch/ia64/kernel/pal.S
+++ b/arch/ia64/kernel/pal.S
@@ -50,12 +50,10 @@ END(ia64_pal_default_handler)
*
* in0 Index of PAL service
* in1 - in3 Remaining PAL arguments
- * in4 1 ==> clear psr.ic, 0 ==> don't clear psr.ic
- *
*/
GLOBAL_ENTRY(ia64_pal_call_static)
- .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(5)
- alloc loc1 = ar.pfs,5,5,0,0
+ .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(4)
+ alloc loc1 = ar.pfs,4,5,0,0
movl loc2 = pal_entry_point
1: {
mov r28 = in0
@@ -64,7 +62,6 @@ GLOBAL_ENTRY(ia64_pal_call_static)
}
;;
ld8 loc2 = [loc2] // loc2 <- entry point
- tbit.nz p6,p7 = in4, 0
adds r8 = 1f-1b,r8
mov loc4=ar.rsc // save RSE configuration
;;
@@ -74,13 +71,11 @@ GLOBAL_ENTRY(ia64_pal_call_static)
.body
mov r30 = in2
-(p6) rsm psr.i | psr.ic
mov r31 = in3
mov b7 = loc2
-(p7) rsm psr.i
+ rsm psr.i
;;
-(p6) srlz.i
mov rp = r8
br.cond.sptk.many b7
1: mov psr.l = loc3