diff options
| author | Kevin Hilman <khilman@deeprootsystems.com> | 2010-10-21 11:21:55 -0700 |
|---|---|---|
| committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-10-21 11:21:55 -0700 |
| commit | 7940a34b2e1e0485211a17d8c3ab4da1ea3e1330 (patch) | |
| tree | fe08ba701cbf23ae44a16d3b7afa521fce943a8a /arch | |
| parent | 6451d7783ba5ff24eb1a544eaa6665b890f30466 (diff) | |
| parent | 8939b3504dc35224cb9c88e5af925b22ea9eee71 (diff) | |
Merge branch 'davinci-next' into davinci-for-linus
Conflicts:
arch/arm/mach-davinci/board-da830-evm.c
arch/arm/mach-davinci/board-da850-evm.c
Diffstat (limited to 'arch')
36 files changed, 1273 insertions, 154 deletions
diff --git a/arch/arm/configs/da8xx_omapl_defconfig b/arch/arm/configs/da8xx_omapl_defconfig index ba6670556f78..cdc40c4b8c48 100644 --- a/arch/arm/configs/da8xx_omapl_defconfig +++ b/arch/arm/configs/da8xx_omapl_defconfig @@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y CONFIG_ARCH_DAVINCI=y CONFIG_ARCH_DAVINCI_DA830=y CONFIG_ARCH_DAVINCI_DA850=y +CONFIG_MACH_MITYOMAPL138=y +CONFIG_MACH_OMAPL138_HAWKBOARD=y CONFIG_DAVINCI_RESET_CLOCKS=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y @@ -79,6 +81,7 @@ CONFIG_I2C_DAVINCI=y # CONFIG_HWMON is not set CONFIG_WATCHDOG=y CONFIG_REGULATOR=y +CONFIG_REGULATOR_DUMMY=y CONFIG_REGULATOR_TPS6507X=y CONFIG_FB=y CONFIG_FB_DA8XX=y diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 71f90f864748..b77b860b36d7 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -20,23 +20,23 @@ config ARCH_DAVINCI_DM644x select ARCH_DAVINCI_DMx config ARCH_DAVINCI_DM355 - bool "DaVinci 355 based system" + bool "DaVinci 355 based system" select AINTC select ARCH_DAVINCI_DMx config ARCH_DAVINCI_DM646x - bool "DaVinci 646x based system" + bool "DaVinci 646x based system" select AINTC select ARCH_DAVINCI_DMx config ARCH_DAVINCI_DA830 - bool "DA830/OMAP-L137 based system" + bool "DA830/OMAP-L137/AM17x based system" select CP_INTC select ARCH_DAVINCI_DA8XX select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1 config ARCH_DAVINCI_DA850 - bool "DA850/OMAP-L138 based system" + bool "DA850/OMAP-L138/AM18x based system" select CP_INTC select ARCH_DAVINCI_DA8XX select ARCH_HAS_CPUFREQ @@ -115,21 +115,21 @@ config MACH_DAVINCI_DM365_EVM for development is a DM365 EVM config MACH_DAVINCI_DA830_EVM - bool "TI DA830/OMAP-L137 Reference Platform" + bool "TI DA830/OMAP-L137/AM17x Reference Platform" default ARCH_DAVINCI_DA830 depends on ARCH_DAVINCI_DA830 select GPIO_PCF857X help - Say Y here to select the TI DA830/OMAP-L137 Evaluation Module. + Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module. choice - prompt "Select DA830/OMAP-L137 UI board peripheral" + prompt "Select DA830/OMAP-L137/AM17x UI board peripheral" depends on MACH_DAVINCI_DA830_EVM help - The presence of UI card on the DA830/OMAP-L137 EVM is detected - automatically based on successful probe of the I2C based GPIO - expander on that board. This option selected in this menu has - an effect only in case of a successful UI card detection. + The presence of UI card on the DA830/OMAP-L137/AM17x EVM is + detected automatically based on successful probe of the I2C + based GPIO expander on that board. This option selected in this + menu has an effect only in case of a successful UI card detection. config DA830_UI_LCD bool "LCD" @@ -140,23 +140,23 @@ config DA830_UI_LCD config DA830_UI_NAND bool "NAND flash" help - Say Y here to use the NAND flash. Do not forget to setup + Say Y here to use the NAND flash. Do not forget to setup the switch correctly. endchoice config MACH_DAVINCI_DA850_EVM - bool "TI DA850/OMAP-L138 Reference Platform" + bool "TI DA850/OMAP-L138/AM18x Reference Platform" default ARCH_DAVINCI_DA850 depends on ARCH_DAVINCI_DA850 select GPIO_PCA953X help - Say Y here to select the TI DA850/OMAP-L138 Evaluation Module. + Say Y here to select the TI DA850/OMAP-L138/AM18x Evaluation Module. choice prompt "Select peripherals connected to expander on UI board" depends on MACH_DAVINCI_DA850_EVM help - The presence of User Interface (UI) card on the DA850/OMAP-L138 + The presence of User Interface (UI) card on the DA850/OMAP-L138/AM18x EVM is detected automatically based on successful probe of the I2C based GPIO expander on that card. This option selected in this menu has an effect only in case of a successful UI card detection. @@ -165,13 +165,13 @@ config DA850_UI_NONE bool "No peripheral is enabled" help Say Y if you do not want to enable any of the peripherals connected - to TCA6416 expander on DA850/OMAP-L138 EVM UI card + to TCA6416 expander on DA850/OMAP-L138/AM18x EVM UI card config DA850_UI_RMII bool "RMII Ethernet PHY" help - Say Y if you want to use the RMII PHY on the DA850/OMAP-L138 EVM. - This PHY is found on the UI daughter card that is supplied with + Say Y if you want to use the RMII PHY on the DA850/OMAP-L138/AM18x + EVM. This PHY is found on the UI daughter card that is supplied with the EVM. NOTE: Please take care while choosing this option, MII PHY will not be functional if RMII mode is selected. @@ -185,6 +185,22 @@ config MACH_TNETV107X help Say Y here to select the TI TNETV107X Evaluation Module. +config MACH_MITYOMAPL138 + bool "Critical Link MityDSP-L138/MityARM-1808 SoM" + depends on ARCH_DAVINCI_DA850 + help + Say Y here to select the Critical Link MityDSP-L138/MityARM-1808 + System on Module. Information on this SoM may be found at + http://www.mitydsp.com + +config MACH_OMAPL138_HAWKBOARD + bool "TI AM1808 / OMAPL-138 Hawkboard platform" + depends on ARCH_DAVINCI_DA850 + help + Say Y here to select the TI AM1808 / OMAPL-138 Hawkboard platform . + Information of this board may be found at + http://www.hawkboard.org/ + config DAVINCI_MUX bool "DAVINCI multiplexing support" depends on ARCH_DAVINCI @@ -195,20 +211,20 @@ config DAVINCI_MUX say Y. config DAVINCI_MUX_DEBUG - bool "Multiplexing debug output" - depends on DAVINCI_MUX - help - Makes the multiplexing functions print out a lot of debug info. - This is useful if you want to find out the correct values of the - multiplexing registers. + bool "Multiplexing debug output" + depends on DAVINCI_MUX + help + Makes the multiplexing functions print out a lot of debug info. + This is useful if you want to find out the correct values of the + multiplexing registers. config DAVINCI_MUX_WARNINGS - bool "Warn about pins the bootloader didn't set up" - depends on DAVINCI_MUX - help - Choose Y here to warn whenever driver initialization logic needs - to change the pin multiplexing setup. When there are no warnings - printed, it's safe to deselect DAVINCI_MUX for your product. + bool "Warn about pins the bootloader didn't set up" + depends on DAVINCI_MUX + help + Choose Y here to warn whenever driver initialization logic needs + to change the pin multiplexing setup. When there are no warnings + printed, it's safe to deselect DAVINCI_MUX for your product. config DAVINCI_RESET_CLOCKS bool "Reset unused clocks during boot" diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index eab4c0fd667a..0b87a1ca2bb3 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -5,7 +5,7 @@ # Common objects obj-y := time.o clock.o serial.o io.o psc.o \ - gpio.o dma.o usb.o common.o sram.o + gpio.o dma.o usb.o common.o sram.o aemif.o obj-$(CONFIG_DAVINCI_MUX) += mux.o @@ -33,6 +33,8 @@ obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o +obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o +obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o # Power Management obj-$(CONFIG_CPU_FREQ) += cpufreq.o diff --git a/arch/arm/mach-davinci/aemif.c b/arch/arm/mach-davinci/aemif.c new file mode 100644 index 000000000000..9c3f500fc12f --- /dev/null +++ b/arch/arm/mach-davinci/aemif.c @@ -0,0 +1,133 @@ +/* + * AEMIF support for DaVinci SoCs + * + * Copyright (C) 2010 Texas Instruments Incorporated. http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/io.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/module.h> +#include <linux/time.h> + +#include <mach/aemif.h> + +/* Timing value configuration */ + +#define TA(x) ((x) << 2) +#define RHOLD(x) ((x) << 4) +#define RSTROBE(x) ((x) << 7) +#define RSETUP(x) ((x) << 13) +#define WHOLD(x) ((x) << 17) +#define WSTROBE(x) ((x) << 20) +#define WSETUP(x) ((x) << 26) + +#define TA_MAX 0x3 +#define RHOLD_MAX 0x7 +#define RSTROBE_MAX 0x3f +#define RSETUP_MAX 0xf +#define WHOLD_MAX 0x7 +#define WSTROBE_MAX 0x3f +#define WSETUP_MAX 0xf + +#define TIMING_MASK (TA(TA_MAX) | \ + RHOLD(RHOLD_MAX) | \ + RSTROBE(RSTROBE_MAX) | \ + RSETUP(RSETUP_MAX) | \ + WHOLD(WHOLD_MAX) | \ + WSTROBE(WSTROBE_MAX) | \ + WSETUP(WSETUP_MAX)) + +/* + * aemif_calc_rate - calculate timing data. + * @wanted: The cycle time needed in nanoseconds. + * @clk: The input clock rate in kHz. + * @max: The maximum divider value that can be programmed. + * + * On success, returns the calculated timing value minus 1 for easy + * programming into AEMIF timing registers, else negative errno. + */ +static int aemif_calc_rate(int wanted, unsigned long clk, int max) +{ + int result; + + result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1; + + pr_debug("%s: result %d from %ld, %d\n", __func__, result, clk, wanted); + + /* It is generally OK to have a more relaxed timing than requested... */ + if (result < 0) + result = 0; + + /* ... But configuring tighter timings is not an option. */ + else if (result > max) + result = -EINVAL; + + return result; +} + +/** + * davinci_aemif_setup_timing - setup timing values for a given AEMIF interface + * @t: timing values to be progammed + * @base: The virtual base address of the AEMIF interface + * @cs: chip-select to program the timing values for + * + * This function programs the given timing values (in real clock) into the + * AEMIF registers taking the AEMIF clock into account. + * + * This function does not use any locking while programming the AEMIF + * because it is expected that there is only one user of a given + * chip-select. + * + * Returns 0 on success, else negative errno. + */ +int davinci_aemif_setup_timing(struct davinci_aemif_timing *t, + void __iomem *base, unsigned cs) +{ + unsigned set, val; + unsigned ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup; + unsigned offset = A1CR_OFFSET + cs * 4; + struct clk *aemif_clk; + unsigned long clkrate; + + if (!t) + return 0; /* Nothing to do */ + + aemif_clk = clk_get(NULL, "aemif"); + if (IS_ERR(aemif_clk)) + return PTR_ERR(aemif_clk); + + clkrate = clk_get_rate(aemif_clk); + + clkrate /= 1000; /* turn clock into kHz for ease of use */ + + ta = aemif_calc_rate(t->ta, clkrate, TA_MAX); + rhold = aemif_calc_rate(t->rhold, clkrate, RHOLD_MAX); + rstrobe = aemif_calc_rate(t->rstrobe, clkrate, RSTROBE_MAX); + rsetup = aemif_calc_rate(t->rsetup, clkrate, RSETUP_MAX); + whold = aemif_calc_rate(t->whold, clkrate, WHOLD_MAX); + wstrobe = aemif_calc_rate(t->wstrobe, clkrate, WSTROBE_MAX); + wsetup = aemif_calc_rate(t->wsetup, clkrate, WSETUP_MAX); + + if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 || + whold < 0 || wstrobe < 0 || wsetup < 0) { + pr_err("%s: cannot get suitable timings\n", __func__); + return -EINVAL; + } + + set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) | + WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup); + + val = __raw_readl(base + offset); + val &= ~TIMING_MASK; + val |= set; + __raw_writel(val, base + offset); + + return 0; +} +EXPORT_SYMBOL(davinci_aemif_setup_timing); diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 7f3cdbfc0fbb..b52a3a1abd94 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -29,10 +29,9 @@ #include <mach/nand.h> #include <mach/da8xx.h> #include <mach/usb.h> +#include <mach/aemif.h> -#define DA830_EVM_PHY_MASK 0x0 -#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ - +#define DA830_EVM_PHY_ID "" /* * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4]. */ @@ -360,6 +359,16 @@ static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = { .pattern = da830_evm_nand_mirror_pattern }; +static struct davinci_aemif_timing da830_evm_nandflash_timing = { + .wsetup = 24, + .wstrobe = 21, + .whold = 14, + .rsetup = 19, + .rstrobe = 50, + .rhold = 0, + .ta = 20, +}; + static struct davinci_nand_pdata da830_evm_nand_pdata = { .parts = da830_evm_nand_partitions, .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions), @@ -368,6 +377,7 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = { .options = NAND_USE_FLASH_BBT, .bbt_td = &da830_evm_nand_bbt_main_descr, .bbt_md = &da830_evm_nand_bbt_mirror_descr, + .timing = &da830_evm_nandflash_timing, }; static struct resource da830_evm_nand_resources[] = { @@ -546,9 +556,8 @@ static __init void da830_evm_init(void) da830_evm_usb_init(); - soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK; - soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY; soc_info->emac_pdata->rmii_en = 1; + soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID; ret = davinci_cfg_reg_list(da830_cpgmac_pins); if (ret) @@ -586,6 +595,9 @@ static __init void da830_evm_init(void) #ifdef CONFIG_SERIAL_8250_CONSOLE static int __init da830_evm_console_init(void) { + if (!machine_is_davinci_da830_evm()) + return 0; + return add_preferred_console("ttyS", 2, "115200"); } console_initcall(da830_evm_console_init); @@ -596,7 +608,7 @@ static void __init da830_evm_map_io(void) da830_init(); } -MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM") +MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM") .boot_params = (DA8XX_DDR_BASE + 0x100), .map_io = da830_evm_map_io, .init_irq = cp_intc_init, diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index b26f5cbfce3e..c6e11c682e4c 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -26,7 +26,6 @@ #include <linux/mtd/physmap.h> #include <linux/regulator/machine.h> #include <linux/regulator/tps6507x.h> -#include <linux/mfd/tps6507x.h> #include <linux/input/tps6507x-ts.h> #include <asm/mach-types.h> @@ -36,10 +35,9 @@ #include <mach/da8xx.h> #include <mach/nand.h> #include <mach/mux.h> +#include <mach/aemif.h> -#define DA850_EVM_PHY_MASK 0x1 -#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ - +#define DA850_EVM_PHY_ID "0:00" #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) @@ -110,7 +108,7 @@ static struct platform_device da850_pm_device = { * to boot, using TI's tools to install the secondary boot loader * (UBL) and U-Boot. */ -struct mtd_partition da850_evm_nandflash_partition[] = { +static struct mtd_partition da850_evm_nandflash_partition[] = { { .name = "u-boot env", .offset = 0, @@ -143,12 +141,23 @@ struct mtd_partition da850_evm_nandflash_partition[] = { }, }; +static struct davinci_aemif_timing da850_evm_nandflash_timing = { + .wsetup = 24, + .wstrobe = 21, + .whold = 14, + .rsetup = 19, + .rstrobe = 50, + .rhold = 0, + .ta = 20, +}; + static struct davinci_nand_pdata da850_evm_nandflash_data = { .parts = da850_evm_nandflash_partition, .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), .ecc_mode = NAND_ECC_HW, .ecc_bits = 4, .options = NAND_USE_FLASH_BBT, + .timing = &da850_evm_nandflash_timing, }; static struct resource da850_evm_nandflash_resource[] = { @@ -196,6 +205,30 @@ static void __init da850_evm_init_nor(void) iounmap(aemif_addr); } +static const short da850_evm_nand_pins[] = { + DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, + DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, + DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, + DA850_NEMA_WE, DA850_NEMA_OE, + -1 +}; + +static const short da850_evm_nor_pins[] = { + DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, + DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, + DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, + DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, + DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, + DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, + DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, + DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, + DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, + DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, + DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, + DA850_EMA_A_22, DA850_EMA_A_23, + -1 +}; + static u32 ui_card_detected; #if defined(CONFIG_MMC_DAVINCI) || \ @@ -205,17 +238,17 @@ static u32 ui_card_detected; #define HAS_MMC 0 #endif -static __init void da850_evm_setup_nor_nand(void) +static inline void da850_evm_setup_nor_nand(void) { int ret = 0; if (ui_card_detected & !HAS_MMC) { - ret = davinci_cfg_reg_list(da850_nand_pins); + ret = davinci_cfg_reg_list(da850_evm_nand_pins); if (ret) pr_warning("da850_evm_init: nand mux setup failed: " "%d\n", ret); - ret = davinci_cfg_reg_list(da850_nor_pins); + ret = davinci_cfg_reg_list(da850_evm_nor_pins); if (ret) pr_warning("da850_evm_init: nor mux setup failed: %d\n", ret); @@ -406,7 +439,7 @@ static int da850_lcd_hw_init(void) /* TPS65070 voltage regulator support */ /* 3.3V */ -struct regulator_consumer_supply tps65070_dcdc1_consumers[] = { +static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = { { .supply = "usb0_vdda33", }, @@ -416,7 +449,7 @@ struct regulator_consumer_supply tps65070_dcdc1_consumers[] = { }; /* 3.3V or 1.8V */ -struct regulator_consumer_supply tps65070_dcdc2_consumers[] = { +static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = { { .supply = "dvdd3318_a", }, @@ -429,14 +462,14 @@ struct regulator_consumer_supply tps65070_dcdc2_consumers[] = { }; /* 1.2V */ -struct regulator_consumer_supply tps65070_dcdc3_consumers[] = { +static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = { { .supply = "cvdd", }, }; /* 1.8V LDO */ -struct regulator_consumer_supply tps65070_ldo1_consumers[] = { +static struct regulator_consumer_supply tps65070_ldo1_consumers[] = { { .supply = "sata_vddr", }, @@ -452,7 +485,7 @@ struct regulator_consumer_supply tps65070_ldo1_consumers[] = { }; /* 1.2V LDO */ -struct regulator_consumer_supply tps65070_ldo2_consumers[] = { +static struct regulator_consumer_supply tps65070_ldo2_consumers[] = { { .supply = "sata_vdd", }, @@ -475,7 +508,7 @@ static struct tps6507x_reg_platform_data tps6507x_platform_data = { .defdcdc_default = true, }; -struct regulator_init_data tps65070_regulator_data[] = { +static struct regulator_init_data tps65070_regulator_data[] = { /* dcdc1 */ { .constraints = { @@ -576,6 +609,23 @@ static const short da850_evm_lcdc_pins[] = { -1 }; +static const short da850_evm_mii_pins[] = { + DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, + DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, + DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, + DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, + DA850_MDIO_D, + -1 +}; + +static const short da850_evm_rmii_pins[] = { + DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, + DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, + DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, + DA850_MDIO_D, + -1 +}; + static int __init da850_evm_config_emac(void) { void __iomem *cfg_chip3_base; @@ -593,12 +643,12 @@ static int __init da850_evm_config_emac(void) if (rmii_en) { val |= BIT(8); - ret = davinci_cfg_reg_list(da850_rmii_pins); + ret = davinci_cfg_reg_list(da850_evm_rmii_pins); pr_info("EMAC: RMII PHY configured, MII PHY will not be" " functional\n"); } else { val &= ~BIT(8); - ret = davinci_cfg_reg_list(da850_cpgmac_pins); + ret = davinci_cfg_reg_list(da850_evm_mii_pins); pr_info("EMAC: MII PHY configured, RMII PHY will not be" " functional\n"); } @@ -625,8 +675,7 @@ static int __init da850_evm_config_emac(void) /* Enable/Disable MII MDIO clock */ gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en); - soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK; - soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY; + soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID; ret = da8xx_register_emac(); if (ret) @@ -787,7 +836,7 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da850_evm_init: rtc setup failed: %d\n", ret); - ret = da850_register_cpufreq(); + ret = da850_register_cpufreq("pll0_sysclk3"); if (ret) pr_warning("da850_evm_init: cpufreq registration failed: %d\n", ret); @@ -806,6 +855,9 @@ static __init void da850_evm_init(void) #ifdef CONFIG_SERIAL_8250_CONSOLE static int __init da850_evm_console_init(void) { + if (!machine_is_davinci_da850_evm()) + return 0; + return add_preferred_console("ttyS", 2, "115200"); } console_initcall(da850_evm_console_init); @@ -816,7 +868,7 @@ static void __init da850_evm_map_io(void) da850_init(); } -MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM") +MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM") .boot_params = (DA8XX_DDR_BASE + 0x100), .map_io = da850_evm_map_io, .init_irq = cp_intc_init, diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 944a0cbaf5cb..c67f684ee3e5 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -54,9 +54,7 @@ static inline int have_tvp7002(void) return 0; } -#define DM365_EVM_PHY_MASK (0x2) -#define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ - +#define DM365_EVM_PHY_ID "0:01" /* * A MAX-II CPLD is used for various board control functions. */ @@ -175,7 +173,9 @@ static struct at24_platform_data eeprom_info = { .context = (void *)0x7f00, }; -static struct snd_platform_data dm365_evm_snd_data; +static struct snd_platform_data dm365_evm_snd_data = { + .asp_chan_q = EVENTQ_3, +}; static struct i2c_board_info i2c_info[] = { { @@ -533,8 +533,7 @@ fail: /* ... and ENET ... */ dm365evm_emac_configure(); - soc_info->emac_pdata->phy_mask = DM365_EVM_PHY_MASK; - soc_info->emac_pdata->mdio_max_freq = DM365_EVM_MDIO_FREQUENCY; + soc_info->emac_pdata->phy_id = DM365_EVM_PHY_ID; resets &= ~BIT(3); /* ... and AIC33 */ diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index d59fba15ba8d..0ca90b834586 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -37,10 +37,9 @@ #include <mach/nand.h> #include <mach/mmc.h> #include <mach/usb.h> +#include <mach/aemif.h> -#define DM644X_EVM_PHY_MASK (0x2) -#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ - +#define DM644X_EVM_PHY_ID "0:01" #define LXT971_PHY_ID (0x001378e2) #define LXT971_PHY_MASK (0xfffffff0) @@ -137,11 +136,22 @@ static struct mtd_partition davinci_evm_nandflash_partition[] = { */ }; +static struct davinci_aemif_timing davinci_evm_nandflash_timing = { + .wsetup = 20, + .wstrobe = 40, + .whold = 20, + .rsetup = 10, + .rstrobe = 40, + .rhold = 10, + .ta = 40, +}; + static struct davinci_nand_pdata davinci_evm_nandflash_data = { .parts = davinci_evm_nandflash_partition, .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition), .ecc_mode = NAND_ECC_HW, .options = NAND_USE_FLASH_BBT, + .timing = &davinci_evm_nandflash_timing, }; static struct resource davinci_evm_nandflash_resource[] = { @@ -695,9 +705,7 @@ static __init void davinci_evm_init(void) davinci_serial_init(&uart_config); dm644x_init_asp(&dm644x_evm_snd_data); - soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK; - soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY; - + soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID; /* Register the fixup for PHY on DaVinci */ phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK, davinci_phy_fixup); diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 6890488fb92b..f6ac9ba74878 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -42,6 +42,7 @@ #include <mach/nand.h> #include <mach/clock.h> #include <mach/cdce949.h> +#include <mach/aemif.h> #include "clock.h" @@ -71,6 +72,16 @@ static struct mtd_partition davinci_nand_partitions[] = { } }; +static struct davinci_aemif_timing dm6467tevm_nandflash_timing = { + .wsetup = 29, + .wstrobe = 24, + .whold = 14, + .rsetup = 19, + .rstrobe = 33, + .rhold = 0, + .ta = 29, +}; + static struct davinci_nand_pdata davinci_nand_data = { .mask_cle = 0x80000, .mask_ale = 0x40000, @@ -718,9 +729,7 @@ static struct davinci_uart_config uart_config __initdata = { .enabled_uarts = (1 << 0), }; -#define DM646X_EVM_PHY_MASK (0x2) -#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ - +#define DM646X_EVM_PHY_ID "0:01" /* * The following EDMA channels/slots are not being used by drivers (for * example: Timer, GPIO, UART events etc) on dm646x, hence they are being @@ -763,6 +772,9 @@ static __init void evm_init(void) dm646x_init_mcasp0(&dm646x_evm_snd_data[0]); dm646x_init_mcasp1(&dm646x_evm_snd_data[1]); + if (machine_is_davinci_dm6467tevm()) + davinci_nand_data.timing = &dm6467tevm_nandflash_timing; + platform_device_register(&davinci_nand_device); dm646x_init_edma(dm646x_edma_rsv); @@ -770,8 +782,7 @@ static __init void evm_init(void) if (HAS_ATA) davinci_init_ide(); - soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK; - soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY; + soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID; } #define DM646X_EVM_REF_FREQ 27000000 diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c new file mode 100644 index 000000000000..194a15ff2b4a --- /dev/null +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -0,0 +1,424 @@ +/* + * Critical Link MityOMAP-L138 SoM + * + * Copyright (C) 2010 Critical Link LLC - http://www.criticallink.com + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of + * any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/console.h> +#include <linux/platform_device.h> +#include <linux/mtd/partitions.h> +#include <linux/regulator/machine.h> +#include <linux/i2c.h> +#include <linux/i2c/at24.h> +#include <linux/etherdevice.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <mach/common.h> +#include <mach/cp_intc.h> +#include <mach/da8xx.h> +#include <mach/nand.h> +#include <mach/mux.h> + +#define MITYOMAPL138_PHY_ID "0:03" + +#define FACTORY_CONFIG_MAGIC 0x012C0138 +#define FACTORY_CONFIG_VERSION 0x00010001 + +/* Data Held in On-Board I2C device */ +struct factory_config { + u32 magic; + u32 version; + u8 mac[6]; + u32 fpga_type; + u32 spare; + u32 serialnumber; + char partnum[32]; +}; + +static struct factory_config factory_config; + +static void read_factory_config(struct memory_accessor *a, void *context) +{ + int ret; + struct davinci_soc_info *soc_info = &davinci_soc_info; + + ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config)); + if (ret != sizeof(struct factory_config)) { + pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n", + ret); + return; + } + + if (factory_config.magic != FACTORY_CONFIG_MAGIC) { + pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n", + factory_config.magic); + return; + } + + if (factory_config.version != FACTORY_CONFIG_VERSION) { + pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n", + factory_config.version); + return; + } + + pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac); + pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum); + if (is_valid_ether_addr(factory_config.mac)) + memcpy(soc_info->emac_pdata->mac_addr, + factory_config.mac, ETH_ALEN); + else + pr_warning("MityOMAPL138: Invalid MAC found " + "in factory config block\n"); +} + +static struct at24_platform_data mityomapl138_fd_chip = { + .byte_len = 256, + .page_size = 8, + .flags = AT24_FLAG_READONLY | AT24_FLAG_IRUGO, + .setup = read_factory_config, + .context = NULL, +}; + +static struct davinci_i2c_platform_data mityomap_i2c_0_pdata = { + .bus_freq = 100, /* kHz */ + .bus_delay = 0, /* usec */ +}; + +/* TPS65023 voltage regulator support */ +/* 1.2V Core */ +static struct regulator_consumer_supply tps65023_dcdc1_consumers[] = { + { + .supply = "cvdd", + }, +}; + +/* 1.8V */ +static struct regulator_consumer_supply tps65023_dcdc2_consumers[] = { + { + .supply = "usb0_vdda18", + }, + { + .supply = "usb1_vdda18", + }, + { + .supply = "ddr_dvdd18", + }, + { + .supply = "sata_vddr", + }, +}; + +/* 1.2V */ +static struct regulator_consumer_supply tps65023_dcdc3_consumers[] = { + { + .supply = "sata_vdd", + }, + { + .supply = "usb_cvdd", + }, + { + .supply = "pll0_vdda", + }, + { + .supply = "pll1_vdda", + }, +}; + +/* 1.8V Aux LDO, not used */ +static struct regulator_consumer_supply tps65023_ldo1_consumers[] = { + { + .supply = "1.8v_aux", + }, +}; + +/* FPGA VCC Aux (2.5 or 3.3) LDO */ +static struct regulator_consumer_supply tps65023_ldo2_consumers[] = { + { + .supply = "vccaux", + }, +}; + +static struct regulator_init_data tps65023_regulator_data[] = { + /* dcdc1 */ + { + .constraints = { + .min_uV = 1150000, + .max_uV = 1350000, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + .boot_on = 1, + }, + .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc1_consumers), + .consumer_supplies = tps65023_dcdc1_consumers, + }, + /* dcdc2 */ + { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .boot_on = 1, + }, + .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc2_consumers), + .consumer_supplies = tps65023_dcdc2_consumers, + }, + /* dcdc3 */ + { + .constraints = { + .min_uV = 1200000, + .max_uV = 1200000, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .boot_on = 1, + }, + .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc3_consumers), + .consumer_supplies = tps65023_dcdc3_consumers, + }, + /* ldo1 */ + { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .boot_on = 1, + }, + .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo1_consumers), + .consumer_supplies = tps65023_ldo1_consumers, + }, + /* ldo2 */ + { + .constraints = { + .min_uV = 2500000, + .max_uV = 3300000, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + .boot_on = 1, + }, + .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo2_consumers), + .consumer_supplies = tps65023_ldo2_consumers, + }, +}; + +static struct i2c_board_info __initdata mityomap_tps65023_info[] = { + { + I2C_BOARD_INFO("tps65023", 0x48), + .platform_data = &tps65023_regulator_data[0], + }, + { + I2C_BOARD_INFO("24c02", 0x50), + .platform_data = &mityomapl138_fd_chip, + }, +}; + +static int __init pmic_tps65023_init(void) +{ + return i2c_register_board_info(1, mityomap_tps65023_info, + ARRAY_SIZE(mityomap_tps65023_info)); +} + +/* + * MityDSP-L138 includes a 256 MByte large-page NAND flash + * (128K blocks). + */ +static struct mtd_partition mityomapl138_nandflash_partition[] = { + { + .name = "rootfs", + .offset = 0, + .size = SZ_128M, + .mask_flags = 0, /* MTD_WRITEABLE, */ + }, + { + .name = "homefs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + }, +}; + +static struct davinci_nand_pdata mityomapl138_nandflash_data = { + .parts = mityomapl138_nandflash_partition, + .nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition), + .ecc_mode = NAND_ECC_HW, + .options = NAND_USE_FLASH_BBT | NAND_BUSWIDTH_16, + .ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */ +}; + +static struct resource mityomapl138_nandflash_resource[] = { + { + .start = DA8XX_AEMIF_CS3_BASE, + .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mityomapl138_nandflash_device = { + .name = "davinci_nand", + .id = 0, + .dev = { + .platform_data = &mityomapl138_nandflash_data, + }, + .num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource), + .resource = mityomapl138_nandflash_resource, +}; + +static struct platform_device *mityomapl138_devices[] __initdata = { + &mityomapl138_nandflash_device, +}; + +static void __init mityomapl138_setup_nand(void) +{ + platform_add_devices(mityomapl138_devices, + ARRAY_SIZE(mityomapl138_devices)); +} + +static struct davinci_uart_config mityomapl138_uart_config __initdata = { + .enabled_uarts = 0x7, +}; + +static const short mityomap_mii_pins[] = { + DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, + DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, + DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, + DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, + DA850_MDIO_D, + -1 +}; + +static const short mityomap_rmii_pins[] = { + DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, + DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, + DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, + DA850_MDIO_D, + -1 +}; + +static void __init mityomapl138_config_emac(void) +{ + void __iomem *cfg_chip3_base; + int ret; + u32 val; + struct davinci_soc_info *soc_info = &davinci_soc_info; + + soc_info->emac_pdata->rmii_en = 0; /* hardcoded for now */ + + cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); + val = __raw_readl(cfg_chip3_base); + + if (soc_info->emac_pdata->rmii_en) { + val |= BIT(8); + ret = davinci_cfg_reg_list(mityomap_rmii_pins); + pr_info("RMII PHY configured\n"); + } else { + val &= ~BIT(8); + ret = davinci_cfg_reg_list(mityomap_mii_pins); + pr_info("MII PHY configured\n"); + } + + if (ret) { + pr_warning("mii/rmii mux setup failed: %d\n", ret); + return; + } + + /* configure the CFGCHIP3 register for RMII or MII */ + __raw_writel(val, cfg_chip3_base); + + soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID; + + ret = da8xx_register_emac(); + if (ret) + pr_warning("emac registration failed: %d\n", ret); +} + +static struct davinci_pm_config da850_pm_pdata = { + .sleepcount = 128, +}; + +static struct platform_device da850_pm_device = { + .name = "pm-davinci", + .dev = { + .platform_data = &da850_pm_pdata, + }, + .id = -1, +}; + +static void __init mityomapl138_init(void) +{ + int ret; + + /* for now, no special EDMA channels are reserved */ + ret = da850_register_edma(NULL); + if (ret) + pr_warning("edma registration failed: %d\n", ret); + + ret = da8xx_register_watchdog(); + if (ret) + pr_warning("watchdog registration failed: %d\n", ret); + + davinci_serial_init(&mityomapl138_uart_config); + + ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata); + if (ret) + pr_warning("i2c0 registration failed: %d\n", ret); + + ret = pmic_tps65023_init(); + if (ret) + pr_warning("TPS65023 PMIC init failed: %d\n", ret); + + mityomapl138_setup_nand(); + + mityomapl138_config_emac(); + + ret = da8xx_register_rtc(); + if (ret) + pr_warning("rtc setup failed: %d\n", ret); + + ret = da850_register_cpufreq("pll0_sysclk3"); + if (ret) + pr_warning("cpufreq registration failed: %d\n", ret); + + ret = da8xx_register_cpuidle(); + if (ret) + pr_warning("cpuidle registration failed: %d\n", ret); + + ret = da850_register_pm(&da850_pm_device); + if (ret) + pr_warning("da850_evm_init: suspend registration failed: %d\n", + ret); +} + +#ifdef CONFIG_SERIAL_8250_CONSOLE +static int __init mityomapl138_console_init(void) +{ + if (!machine_is_mityomapl138()) + return 0; + + return add_preferred_console("ttyS", 1, "115200"); +} +console_initcall(mityomapl138_console_init); +#endif + +static void __init mityomapl138_map_io(void) +{ + da850_init(); +} + +MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808") + .phys_io = IO_PHYS, + .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, + .boot_params = (DA8XX_DDR_BASE + 0x100), + .map_io = mityomapl138_map_io, + .init_irq = cp_intc_init, + .timer = &davinci_timer, + .init_machine = mityomapl138_init, +MACHINE_END diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index a4def889275c..6c389ff1020e 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c @@ -39,9 +39,7 @@ #include <mach/mmc.h> #include <mach/usb.h> -#define NEUROS_OSD2_PHY_MASK 0x2 -#define NEUROS_OSD2_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ - +#define NEUROS_OSD2_PHY_ID "0:01" #define LXT971_PHY_ID 0x001378e2 #define LXT971_PHY_MASK 0xfffffff0 @@ -252,8 +250,7 @@ static __init void davinci_ntosd2_init(void) davinci_serial_init(&uart_config); dm644x_init_asp(&dm644x_ntosd2_snd_data); - soc_info->emac_pdata->phy_mask = NEUROS_OSD2_PHY_MASK; - soc_info->emac_pdata->mdio_max_freq = NEUROS_OSD2_MDIO_FREQUENCY; + soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID; davinci_setup_usb(1000, 8); /* diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c new file mode 100644 index 000000000000..c472dd88ad91 --- /dev/null +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -0,0 +1,64 @@ +/* + * Hawkboard.org based on TI's OMAP-L138 Platform + * + * Initial code: Syed Mohammed Khasim + * + * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of + * any kind, whether express or implied. + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/console.h> +#include <linux/gpio.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +#include <mach/cp_intc.h> +#include <mach/da8xx.h> + +static struct davinci_uart_config omapl138_hawk_uart_config __initdata = { + .enabled_uarts = 0x7, +}; + +static __init void omapl138_hawk_init(void) +{ + int ret; + + davinci_serial_init(&omapl138_hawk_uart_config); + + ret = da8xx_register_watchdog(); + if (ret) + pr_warning("omapl138_hawk_init: " + "watchdog registration failed: %d\n", + ret); +} + +#ifdef CONFIG_SERIAL_8250_CONSOLE +static int __init omapl138_hawk_console_init(void) +{ + if (!machine_is_omapl138_hawkboard()) + return 0; + + return add_preferred_console("ttyS", 2, "115200"); +} +console_initcall(omapl138_hawk_console_init); +#endif + +static void __init omapl138_hawk_map_io(void) +{ + da850_init(); +} + +MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard") + .phys_io = IO_PHYS, + .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, + .boot_params = (DA8XX_DDR_BASE + 0x100), + .map_io = omapl138_hawk_map_io, + .init_irq = cp_intc_init, + .timer = &davinci_timer, + .init_machine = omapl138_hawk_init, +MACHINE_END diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index 9bdf8aafcc84..61ac96d8f00d 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c @@ -42,9 +42,7 @@ #include <mach/mux.h> #include <mach/usb.h> -#define SFFSDR_PHY_MASK (0x2) -#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ - +#define SFFSDR_PHY_ID "0:01" static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { /* U-Boot Environment: Block 0 * UBL: Block 1 @@ -143,8 +141,7 @@ static __init void davinci_sffsdr_init(void) ARRAY_SIZE(davinci_sffsdr_devices)); sffsdr_init_i2c(); davinci_serial_init(&uart_config); - soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK; - soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY; + soc_info->emac_pdata->phy_id = SFFSDR_PHY_ID; davinci_setup_usb(0, 0); /* We support only peripheral mode. */ /* mux VLYNQ pins */ diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c index b4de35b78904..a6db85460227 100644 --- a/arch/arm/mach-davinci/board-tnetv107x-evm.c +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c @@ -23,6 +23,9 @@ #include <linux/ratelimit.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/input.h> +#include <linux/input/matrix_keypad.h> + #include <asm/mach/arch.h> #include <asm/mach-types.h> @@ -141,10 +144,63 @@ static struct davinci_uart_config serial_config __initconst = { .enabled_uarts = BIT(1), }; +static const uint32_t keymap[] = { + KEY(0, 0, KEY_NUMERIC_1), + KEY(0, 1, KEY_NUMERIC_2), + KEY(0, 2, KEY_NUMERIC_3), + KEY(0, 3, KEY_FN_F1), + KEY(0, 4, KEY_MENU), + + KEY(1, 0, KEY_NUMERIC_4), + KEY(1, 1, KEY_NUMERIC_5), + KEY(1, 2, KEY_NUMERIC_6), + KEY(1, 3, KEY_UP), + KEY(1, 4, KEY_FN_F2), + + KEY(2, 0, KEY_NUMERIC_7), + KEY(2, 1, KEY_NUMERIC_8), + KEY(2, 2, KEY_NUMERIC_9), + KEY(2, 3, KEY_LEFT), + KEY(2, 4, KEY_ENTER), + + KEY(3, 0, KEY_NUMERIC_STAR), + KEY(3, 1, KEY_NUMERIC_0), + KEY(3, 2, KEY_NUMERIC_POUND), + KEY(3, 3, KEY_DOWN), + KEY(3, 4, KEY_RIGHT), + + KEY(4, 0, KEY_FN_F3), + KEY(4, 1, KEY_FN_F4), + KEY(4, 2, KEY_MUTE), + KEY(4, 3, KEY_HOME), + KEY(4, 4, KEY_BACK), + + KEY(5, 0, KEY_VOLUMEDOWN), + KEY(5, 1, KEY_VOLUMEUP), + KEY(5, 2, KEY_F1), + KEY(5, 3, KEY_F2), + KEY(5, 4, KEY_F3), +}; + +static const struct matrix_keymap_data keymap_data = { + .keymap = keymap, + .keymap_size = ARRAY_SIZE(keymap), +}; + +static struct matrix_keypad_platform_data keypad_config = { + .keymap_data = &keymap_data, + .num_row_gpios = 6, + .num_col_gpios = 5, + .debounce_ms = 0, /* minimum */ + .active_low = 0, /* pull up realization */ + .no_autorepeat = 0, +}; + static struct tnetv107x_device_info evm_device_info __initconst = { .serial_config = &serial_config, .mmc_config[1] = &mmc_config, /* controller 1 */ .nand_config[0] = &nand_config, /* chip select 0 */ + .keypad_config = &keypad_config, }; static __init void tnetv107x_evm_board_init(void) diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 054c303caead..01ba080433db 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -236,7 +236,7 @@ static int __init clk_disable_unused(void) if (!davinci_psc_is_clk_active(ck->gpsc, ck->lpsc)) continue; - pr_info("Clocks: disable unused %s\n", ck->name); + pr_debug("Clocks: disable unused %s\n", ck->name); davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, (ck->flags & PSC_SWRSTDISABLE) ? @@ -287,6 +287,79 @@ static unsigned long clk_sysclk_recalc(struct clk *clk) return rate; } +int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate) +{ + unsigned v; + struct pll_data *pll; + unsigned long input; + unsigned ratio = 0; + + /* If this is the PLL base clock, wrong function to call */ + if (clk->pll_data) + return -EINVAL; + + /* There must be a parent... */ + if (WARN_ON(!clk->parent)) + return -EINVAL; + + /* ... the parent must be a PLL... */ + if (WARN_ON(!clk->parent->pll_data)) + return -EINVAL; + + /* ... and this clock must have a divider. */ + if (WARN_ON(!clk->div_reg)) + return -EINVAL; + + pll = clk->parent->pll_data; + + input = clk->parent->rate; + + /* If pre-PLL, source clock is before the multiplier and divider(s) */ + if (clk->flags & PRE_PLL) + input = pll->input_rate; + + if (input > rate) { + /* + * Can afford to provide an output little higher than requested + * only if maximum rate supported by hardware on this sysclk + * is known. + */ + if (clk->maxrate) { + ratio = DIV_ROUND_CLOSEST(input, rate); + if (input / ratio > clk->maxrate) + ratio = 0; + } + + if (ratio == 0) + ratio = DIV_ROUND_UP(input, rate); + + ratio--; + } + + if (ratio > PLLDIV_RATIO_MASK) + return -EINVAL; + + do { + v = __raw_readl(pll->base + PLLSTAT); + } while (v & PLLSTAT_GOSTAT); + + v = __raw_readl(pll->base + clk->div_reg); + v &= ~PLLDIV_RATIO_MASK; + v |= ratio | PLLDIV_EN; + __raw_writel(v, pll->base + clk->div_reg); + + v = __raw_readl(pll->base + PLLCMD); + v |= PLLCMD_GOSET; + __raw_writel(v, pll->base + PLLCMD); + + do { + v = __raw_readl(pll->base + PLLSTAT); + } while (v & PLLSTAT_GOSTAT); + + return 0; +} +EXPORT_SYMBOL(davinci_set_sysclk_rate); + static unsigned long clk_leafclk_recalc(struct clk *clk) { if (WARN_ON(!clk->parent)) diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 01e36483ac3d..11099980b58b 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -70,6 +70,9 @@ #include <linux/list.h> #include <asm/clkdev.h> +#define PLLSTAT_GOSTAT BIT(0) +#define PLLCMD_GOSET BIT(0) + struct pll_data { u32 phys_base; void __iomem *base; @@ -86,6 +89,7 @@ struct clk { struct module *owner; const char *name; unsigned long rate; + unsigned long maxrate; /* H/W supported max rate */ u8 usecount; u8 lpsc; u8 gpsc; @@ -118,6 +122,7 @@ struct clk { int davinci_clk_init(struct clk_lookup *clocks); int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, unsigned int mult, unsigned int postdiv); +int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate); extern struct platform_device davinci_wdt_device; extern void davinci_watchdog_reset(struct platform_device *); diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c index d3fa6de1e20f..343de73161fa 100644 --- a/arch/arm/mach-davinci/cpufreq.c +++ b/arch/arm/mach-davinci/cpufreq.c @@ -34,6 +34,8 @@ struct davinci_cpufreq { struct device *dev; struct clk *armclk; + struct clk *asyncclk; + unsigned long asyncrate; }; static struct davinci_cpufreq cpufreq; @@ -104,15 +106,27 @@ static int davinci_target(struct cpufreq_policy *policy, cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); /* if moving to higher frequency, up the voltage beforehand */ - if (pdata->set_voltage && freqs.new > freqs.old) - pdata->set_voltage(idx); + if (pdata->set_voltage && freqs.new > freqs.old) { + ret = pdata->set_voltage(idx); + if (ret) + goto out; + } ret = clk_set_rate(armclk, idx); + if (ret) + goto out; + + if (cpufreq.asyncclk) { + ret = clk_set_rate(cpufreq.asyncclk, cpufreq.asyncrate); + if (ret) + goto out; + } /* if moving to lower freq, lower the voltage after lowering freq */ if (pdata->set_voltage && freqs.new < freqs.old) pdata->set_voltage(idx); +out: cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); return ret; @@ -185,6 +199,7 @@ static struct cpufreq_driver davinci_driver = { static int __init davinci_cpufreq_probe(struct platform_device *pdev) { struct davinci_cpufreq_config *pdata = pdev->dev.platform_data; + struct clk *asyncclk; if (!pdata) return -EINVAL; @@ -199,6 +214,12 @@ static int __init davinci_cpufreq_probe(struct platform_device *pdev) return PTR_ERR(cpufreq.armclk); } + asyncclk = clk_get(cpufreq.dev, "async"); + if (!IS_ERR(asyncclk)) { + cpufreq.asyncclk = asyncclk; + cpufreq.asyncrate = clk_get_rate(asyncclk); + } + return cpufreq_register_driver(&davinci_driver); } @@ -206,6 +227,9 @@ static int __exit davinci_cpufreq_remove(struct platform_device *pdev) { clk_put(cpufreq.armclk); + if (cpufreq.asyncclk) + clk_put(cpufreq.asyncclk); + return cpufreq_unregister_driver(&davinci_driver); } diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 68ed58a48252..63916b902760 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -86,6 +86,8 @@ static struct clk pll0_sysclk3 = { .parent = &pll0_clk, .flags = CLK_PLL, .div_reg = PLLDIV3, + .set_rate = davinci_set_sysclk_rate, + .maxrate = 100000000, }; static struct clk pll0_sysclk4 = { @@ -323,12 +325,19 @@ static struct clk lcdc_clk = { .gpsc = 1, }; -static struct clk mmcsd_clk = { - .name = "mmcsd", +static struct clk mmcsd0_clk = { + .name = "mmcsd0", .parent = &pll0_sysclk2, .lpsc = DA8XX_LPSC0_MMC_SD, }; +static struct clk mmcsd1_clk = { + .name = "mmcsd1", + .parent = &pll0_sysclk2, + .lpsc = DA850_LPSC1_MMC_SD1, + .gpsc = 1, +}; + static struct clk aemif_clk = { .name = "aemif", .parent = &pll0_sysclk3, @@ -375,7 +384,8 @@ static struct clk_lookup da850_clks[] = { CLK("davinci_emac.1", NULL, &emac_clk), CLK("davinci-mcasp.0", NULL, &mcasp_clk), CLK("da8xx_lcdc.0", NULL, &lcdc_clk), - CLK("davinci_mmc.0", NULL, &mmcsd_clk), + CLK("davinci_mmc.0", NULL, &mmcsd0_clk), + CLK("davinci_mmc.1", NULL, &mmcsd1_clk), CLK(NULL, "aemif", &aemif_clk), CLK(NULL, NULL, NULL), }; @@ -572,15 +582,9 @@ const short da850_cpgmac_pins[] __initdata = { DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, - DA850_MDIO_D, - -1 -}; - -const short da850_rmii_pins[] __initdata = { - DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, - DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, - DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, - DA850_MDIO_D, + DA850_MDIO_D, DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, + DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, DA850_RMII_RXER, + DA850_RMII_MHZ_50_CLK, -1 }; @@ -607,27 +611,19 @@ const short da850_mmcsd0_pins[] __initdata = { -1 }; -const short da850_nand_pins[] __initdata = { - DA850_EMA_D_7, DA850_EMA_D_6, DA850_EMA_D_5, DA850_EMA_D_4, - DA850_EMA_D_3, DA850_EMA_D_2, DA850_EMA_D_1, DA850_EMA_D_0, - DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, - DA850_NEMA_WE, DA850_NEMA_OE, - -1 -}; - -const short da850_nor_pins[] __initdata = { +const short da850_emif25_pins[] __initdata = { DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, - DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, - DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, - DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, - DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, - DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, - DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, - DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, - DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, - DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, - DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, - DA850_EMA_A_22, DA850_EMA_A_23, + DA850_NEMA_CS_3, DA850_NEMA_CS_4, DA850_NEMA_WE, DA850_NEMA_OE, + DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, + DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, + DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11, + DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15, + DA850_EMA_A_0, DA850_EMA_A_1, DA850_EMA_A_2, DA850_EMA_A_3, + DA850_EMA_A_4, DA850_EMA_A_5, DA850_EMA_A_6, DA850_EMA_A_7, + DA850_EMA_A_8, DA850_EMA_A_9, DA850_EMA_A_10, DA850_EMA_A_11, + DA850_EMA_A_12, DA850_EMA_A_13, DA850_EMA_A_14, DA850_EMA_A_15, + DA850_EMA_A_16, DA850_EMA_A_17, DA850_EMA_A_18, DA850_EMA_A_19, + DA850_EMA_A_20, DA850_EMA_A_21, DA850_EMA_A_22, DA850_EMA_A_23, -1 }; @@ -851,7 +847,7 @@ static const struct da850_opp da850_opp_300 = { .prediv = 1, .mult = 25, .postdiv = 2, - .cvdd_min = 1140000, + .cvdd_min = 1200000, .cvdd_max = 1320000, }; @@ -860,7 +856,7 @@ static const struct da850_opp da850_opp_200 = { .prediv = 1, .mult = 25, .postdiv = 3, - .cvdd_min = 1050000, + .cvdd_min = 1100000, .cvdd_max = 1160000, }; @@ -869,7 +865,7 @@ static const struct da850_opp da850_opp_96 = { .prediv = 1, .mult = 20, .postdiv = 5, - .cvdd_min = 950000, + .cvdd_min = 1000000, .cvdd_max = 1050000, }; @@ -929,10 +925,16 @@ static struct platform_device da850_cpufreq_device = { .dev = { .platform_data = &cpufreq_info, }, + .id = -1, }; -int __init da850_register_cpufreq(void) +int __init da850_register_cpufreq(char *async_clk) { + /* cpufreq driver can help keep an "async" clock constant */ + if (async_clk) + clk_add_alias("async", da850_cpufreq_device.name, + async_clk, NULL); + return platform_device_register(&da850_cpufreq_device); } @@ -983,7 +985,7 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index) return 0; } #else -int __init da850_register_cpufreq(void) +int __init da850_register_cpufreq(char *async_clk) { return 0; } diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 52bc7b1c6ca3..9eec63070e0c 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -24,6 +24,7 @@ #include "clock.h" #define DA8XX_TPCC_BASE 0x01c00000 +#define DA850_MMCSD1_BASE 0x01e1b000 #define DA850_TPCC1_BASE 0x01e30000 #define DA8XX_TPTC0_BASE 0x01c08000 #define DA8XX_TPTC1_BASE 0x01c08400 @@ -41,7 +42,6 @@ #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 #define DA8XX_EMAC_RAM_OFFSET 0x0000 -#define DA8XX_MDIO_REG_OFFSET 0x4000 #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K void __iomem *da8xx_syscfg0_base; @@ -351,7 +351,7 @@ int __init da8xx_register_watchdog(void) static struct resource da8xx_emac_resources[] = { { .start = DA8XX_EMAC_CPPI_PORT_BASE, - .end = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1, + .end = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { @@ -380,7 +380,6 @@ struct emac_platform_data da8xx_emac_pdata = { .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET, .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET, .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET, - .mdio_reg_offset = DA8XX_MDIO_REG_OFFSET, .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE, .version = EMAC_VERSION_2, }; @@ -395,9 +394,34 @@ static struct platform_device da8xx_emac_device = { .resource = da8xx_emac_resources, }; +static struct resource da8xx_mdio_resources[] = { + { + .start = DA8XX_EMAC_MDIO_BASE, + .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da8xx_mdio_device = { + .name = "davinci_mdio", + .id = 0, + .num_resources = ARRAY_SIZE(da8xx_mdio_resources), + .resource = da8xx_mdio_resources, +}; + int __init da8xx_register_emac(void) { - return platform_device_register(&da8xx_emac_device); + int ret; + + ret = platform_device_register(&da8xx_mdio_device); + if (ret < 0) + return ret; + ret = platform_device_register(&da8xx_emac_device); + if (ret < 0) + return ret; + ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev), + NULL, &da8xx_emac_device.dev); + return ret; } static struct resource da830_mcasp1_resources[] = { @@ -566,6 +590,44 @@ int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config) return platform_device_register(&da8xx_mmcsd0_device); } +#ifdef CONFIG_ARCH_DAVINCI_DA850 +static struct resource da850_mmcsd1_resources[] = { + { /* registers */ + .start = DA850_MMCSD1_BASE, + .end = DA850_MMCSD1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { /* interrupt */ + .start = IRQ_DA850_MMCSDINT0_1, + .end = IRQ_DA850_MMCSDINT0_1, + .flags = IORESOURCE_IRQ, + }, + { /* DMA RX */ + .start = EDMA_CTLR_CHAN(1, 28), + .end = EDMA_CTLR_CHAN(1, 28), + .flags = IORESOURCE_DMA, + }, + { /* DMA TX */ + .start = EDMA_CTLR_CHAN(1, 29), + .end = EDMA_CTLR_CHAN(1, 29), + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device da850_mmcsd1_device = { + .name = "davinci_mmc", + .id = 1, + .num_resources = ARRAY_SIZE(da850_mmcsd1_resources), + .resource = da850_mmcsd1_resources, +}; + +int __init da850_register_mmcsd1(struct davinci_mmc_config *config) +{ + da850_mmcsd1_device.dev.platform_data = config; + return platform_device_register(&da850_mmcsd1_device); +} +#endif + static struct resource da8xx_rtc_resources[] = { { .start = DA8XX_RTC_BASE, diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c index 2718a3a90dff..c9a86d8130d1 100644 --- a/arch/arm/mach-davinci/devices-tnetv107x.c +++ b/arch/arm/mach-davinci/devices-tnetv107x.c @@ -31,8 +31,10 @@ #define TNETV107X_TPTC0_BASE 0x01c10000 #define TNETV107X_TPTC1_BASE 0x01c10400 #define TNETV107X_WDOG_BASE 0x08086700 +#define TNETV107X_TSC_BASE 0x08088500 #define TNETV107X_SDIO0_BASE 0x08088700 #define TNETV107X_SDIO1_BASE 0x08088800 +#define TNETV107X_KEYPAD_BASE 0x08088a00 #define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000 #define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000 #define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000 @@ -298,12 +300,55 @@ static int __init nand_init(int chipsel, struct davinci_nand_pdata *data) return platform_device_register(pdev); } +static struct resource keypad_resources[] = { + { + .start = TNETV107X_KEYPAD_BASE, + .end = TNETV107X_KEYPAD_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_TNETV107X_KEYPAD, + .flags = IORESOURCE_IRQ, + .name = "press", + }, + { + .start = IRQ_TNETV107X_KEYPAD_FREE, + .flags = IORESOURCE_IRQ, + .name = "release", + }, +}; + +static struct platform_device keypad_device = { + .name = "tnetv107x-keypad", + .num_resources = ARRAY_SIZE(keypad_resources), + .resource = keypad_resources, +}; + +static struct resource tsc_resources[] = { + { + .start = TNETV107X_TSC_BASE, + .end = TNETV107X_TSC_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_TNETV107X_TSC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tsc_device = { + .name = "tnetv107x-ts", + .num_resources = ARRAY_SIZE(tsc_resources), + .resource = tsc_resources, +}; + void __init tnetv107x_devices_init(struct tnetv107x_device_info *info) { int i; platform_device_register(&edma_device); platform_device_register(&tnetv107x_wdt_device); + platform_device_register(&tsc_device); if (info->serial_config) davinci_serial_init(info->serial_config); @@ -317,4 +362,9 @@ void __init tnetv107x_devices_init(struct tnetv107x_device_info *info) for (i = 0; i < 4; i++) if (info->nand_config[i]) nand_init(i, info->nand_config[i]); + + if (info->keypad_config) { + keypad_device.dev.platform_data = info->keypad_config; + platform_device_register(&keypad_device); + } } diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 8b7201e4c79c..2a9a252327d8 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c @@ -213,7 +213,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c); /* Configure pull down control */ - __raw_writel((__raw_readl(pupdctl1) & ~0x400), + __raw_writel((__raw_readl(pupdctl1) & ~0xfc0), pupdctl1); mmcsd1_resources[0].start = DM365_MMCSD1_BASE; diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 7781e35daec3..a12065e87266 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -691,7 +691,6 @@ static struct emac_platform_data dm365_emac_pdata = { .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET, .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET, .ctrl_ram_offset = DM365_EMAC_CNTRL_RAM_OFFSET, - .mdio_reg_offset = DM365_EMAC_MDIO_OFFSET, .ctrl_ram_size = DM365_EMAC_CNTRL_RAM_SIZE, .version = EMAC_VERSION_2, }; @@ -699,7 +698,7 @@ static struct emac_platform_data dm365_emac_pdata = { static struct resource dm365_emac_resources[] = { { .start = DM365_EMAC_BASE, - .end = DM365_EMAC_BASE + 0x47ff, + .end = DM365_EMAC_BASE + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { @@ -734,6 +733,21 @@ static struct platform_device dm365_emac_device = { .resource = dm365_emac_resources, }; +static struct resource dm365_mdio_resources[] = { + { + .start = DM365_EMAC_MDIO_BASE, + .end = DM365_EMAC_MDIO_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm365_mdio_device = { + .name = "davinci_mdio", + .id = 0, + .num_resources = ARRAY_SIZE(dm365_mdio_resources), + .resource = dm365_mdio_resources, +}; + static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = { [IRQ_VDINT0] = 2, [IRQ_VDINT1] = 6, @@ -1219,7 +1233,12 @@ static int __init dm365_init_devices(void) davinci_cfg_reg(DM365_INT_EDMA_CC); platform_device_register(&dm365_edma_device); + + platform_device_register(&dm365_mdio_device); platform_device_register(&dm365_emac_device); + clk_add_alias(NULL, dev_name(&dm365_mdio_device.dev), + NULL, &dm365_emac_device.dev); + /* Add isif clock alias */ clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL); platform_device_register(&dm365_vpss_device); diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 5e5b0a7831fb..0608dd776a16 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -322,7 +322,6 @@ static struct emac_platform_data dm644x_emac_pdata = { .ctrl_reg_offset = DM644X_EMAC_CNTRL_OFFSET, .ctrl_mod_reg_offset = DM644X_EMAC_CNTRL_MOD_OFFSET, .ctrl_ram_offset = DM644X_EMAC_CNTRL_RAM_OFFSET, - .mdio_reg_offset = DM644X_EMAC_MDIO_OFFSET, .ctrl_ram_size = DM644X_EMAC_CNTRL_RAM_SIZE, .version = EMAC_VERSION_1, }; @@ -330,7 +329,7 @@ static struct emac_platform_data dm644x_emac_pdata = { static struct resource dm644x_emac_resources[] = { { .start = DM644X_EMAC_BASE, - .end = DM644X_EMAC_BASE + 0x47ff, + .end = DM644X_EMAC_BASE + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { @@ -350,6 +349,21 @@ static struct platform_device dm644x_emac_device = { .resource = dm644x_emac_resources, }; +static struct resource dm644x_mdio_resources[] = { + { + .start = DM644X_EMAC_MDIO_BASE, + .end = DM644X_EMAC_MDIO_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm644x_mdio_device = { + .name = "davinci_mdio", + .id = 0, + .num_resources = ARRAY_SIZE(dm644x_mdio_resources), + .resource = dm644x_mdio_resources, +}; + /* * Device specific mux setup * @@ -776,7 +790,12 @@ static int __init dm644x_init_devices(void) clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL); clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL); platform_device_register(&dm644x_edma_device); + + platform_device_register(&dm644x_mdio_device); platform_device_register(&dm644x_emac_device); + clk_add_alias(NULL, dev_name(&dm644x_mdio_device.dev), + NULL, &dm644x_emac_device.dev); + platform_device_register(&dm644x_vpss_device); platform_device_register(&dm644x_ccdc_dev); platform_device_register(&vpfe_capture_dev); diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 26e8a9c7f50b..1e0f809644bb 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -358,7 +358,6 @@ static struct emac_platform_data dm646x_emac_pdata = { .ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET, .ctrl_mod_reg_offset = DM646X_EMAC_CNTRL_MOD_OFFSET, .ctrl_ram_offset = DM646X_EMAC_CNTRL_RAM_OFFSET, - .mdio_reg_offset = DM646X_EMAC_MDIO_OFFSET, .ctrl_ram_size = DM646X_EMAC_CNTRL_RAM_SIZE, .version = EMAC_VERSION_2, }; @@ -366,7 +365,7 @@ static struct emac_platform_data dm646x_emac_pdata = { static struct resource dm646x_emac_resources[] = { { .start = DM646X_EMAC_BASE, - .end = DM646X_EMAC_BASE + 0x47ff, + .end = DM646X_EMAC_BASE + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { @@ -401,6 +400,21 @@ static struct platform_device dm646x_emac_device = { .resource = dm646x_emac_resources, }; +static struct resource dm646x_mdio_resources[] = { + { + .start = DM646X_EMAC_MDIO_BASE, + .end = DM646X_EMAC_MDIO_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm646x_mdio_device = { + .name = "davinci_mdio", + .id = 0, + .num_resources = ARRAY_SIZE(dm646x_mdio_resources), + .resource = dm646x_mdio_resources, +}; + /* * Device specific mux setup * @@ -896,7 +910,11 @@ static int __init dm646x_init_devices(void) if (!cpu_is_davinci_dm646x()) return 0; + platform_device_register(&dm646x_mdio_device); platform_device_register(&dm646x_emac_device); + clk_add_alias(NULL, dev_name(&dm646x_mdio_device.dev), + NULL, &dm646x_emac_device.dev); + return 0; } postcore_initcall(dm646x_init_devices); diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c index 2ede598b77dd..6b9669869c46 100644 --- a/arch/arm/mach-davinci/dma.c +++ b/arch/arm/mach-davinci/dma.c @@ -354,10 +354,12 @@ static int irq2ctlr(int irq) static irqreturn_t dma_irq_handler(int irq, void *data) { int i; - unsigned ctlr; + int ctlr; unsigned int cnt = 0; ctlr = irq2ctlr(irq); + if (ctlr < 0) + return IRQ_NONE; dev_dbg(data, "dma_irq_handler\n"); @@ -408,10 +410,12 @@ static irqreturn_t dma_irq_handler(int irq, void *data) static irqreturn_t dma_ccerr_handler(int irq, void *data) { int i; - unsigned ctlr; + int ctlr; unsigned int cnt = 0; ctlr = irq2ctlr(irq); + if (ctlr < 0) + return IRQ_NONE; dev_dbg(data, "dma_ccerr_handler\n"); diff --git a/arch/arm/mach-davinci/include/mach/aemif.h b/arch/arm/mach-davinci/include/mach/aemif.h new file mode 100644 index 000000000000..05b293443097 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/aemif.h @@ -0,0 +1,36 @@ +/* + * TI DaVinci AEMIF support + * + * Copyright 2010 (C) Texas Instruments, Inc. http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ +#ifndef _MACH_DAVINCI_AEMIF_H +#define _MACH_DAVINCI_AEMIF_H + +#define NRCSR_OFFSET 0x00 +#define AWCCR_OFFSET 0x04 +#define A1CR_OFFSET 0x10 + +#define ACR_ASIZE_MASK 0x3 +#define ACR_EW_MASK BIT(30) +#define ACR_SS_MASK BIT(31) + +/* All timings in nanoseconds */ +struct davinci_aemif_timing { + u8 wsetup; + u8 wstrobe; + u8 whold; + + u8 rsetup; + u8 rstrobe; + u8 rhold; + + u8 ta; +}; + +int davinci_aemif_setup_timing(struct davinci_aemif_timing *t, + void __iomem *base, unsigned cs); +#endif diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 3c07059f526e..4247b3f53b33 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -76,9 +76,10 @@ int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); int da8xx_register_emac(void); int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); int da8xx_register_mmcsd0(struct davinci_mmc_config *config); +int da850_register_mmcsd1(struct davinci_mmc_config *config); void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata); int da8xx_register_rtc(void); -int da850_register_cpufreq(void); +int da850_register_cpufreq(char *async_clk); int da8xx_register_cpuidle(void); void __iomem * __init da8xx_get_mem_ctlr(void); int da850_register_pm(struct platform_device *pdev); @@ -121,11 +122,9 @@ extern const short da850_uart2_pins[]; extern const short da850_i2c0_pins[]; extern const short da850_i2c1_pins[]; extern const short da850_cpgmac_pins[]; -extern const short da850_rmii_pins[]; extern const short da850_mcasp_pins[]; extern const short da850_lcdcntl_pins[]; extern const short da850_mmcsd0_pins[]; -extern const short da850_nand_pins[]; -extern const short da850_nor_pins[]; +extern const short da850_emif25_pins[]; #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h index ea5df3b49ec4..2563bf4e93a1 100644 --- a/arch/arm/mach-davinci/include/mach/dm365.h +++ b/arch/arm/mach-davinci/include/mach/dm365.h @@ -21,10 +21,10 @@ #include <media/davinci/vpfe_capture.h> #define DM365_EMAC_BASE (0x01D07000) +#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) #define DM365_EMAC_CNTRL_OFFSET (0x0000) #define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000) #define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000) -#define DM365_EMAC_MDIO_OFFSET (0x4000) #define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) /* Base of key scan register bank */ diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h index 6fca568a0fd2..5a1b26d4e68b 100644 --- a/arch/arm/mach-davinci/include/mach/dm644x.h +++ b/arch/arm/mach-davinci/include/mach/dm644x.h @@ -28,10 +28,10 @@ #include <media/davinci/vpfe_capture.h> #define DM644X_EMAC_BASE (0x01C80000) +#define DM644X_EMAC_MDIO_BASE (DM644X_EMAC_BASE + 0x4000) #define DM644X_EMAC_CNTRL_OFFSET (0x0000) #define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000) #define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000) -#define DM644X_EMAC_MDIO_OFFSET (0x4000) #define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) #define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000 diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index 0a27ee9a70e1..7a27f3f13913 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h @@ -19,10 +19,10 @@ #include <linux/davinci_emac.h> #define DM646X_EMAC_BASE (0x01C80000) +#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) #define DM646X_EMAC_CNTRL_OFFSET (0x0000) #define DM646X_EMAC_CNTRL_MOD_OFFSET (0x1000) #define DM646X_EMAC_CNTRL_RAM_OFFSET (0x2000) -#define DM646X_EMAC_MDIO_OFFSET (0x4000) #define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000) #define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 diff --git a/arch/arm/mach-davinci/include/mach/nand.h b/arch/arm/mach-davinci/include/mach/nand.h index b2ad8090bd10..025151049f05 100644 --- a/arch/arm/mach-davinci/include/mach/nand.h +++ b/arch/arm/mach-davinci/include/mach/nand.h @@ -30,9 +30,6 @@ #include <linux/mtd/nand.h> -#define NRCSR_OFFSET 0x00 -#define AWCCR_OFFSET 0x04 -#define A1CR_OFFSET 0x10 #define NANDFCR_OFFSET 0x60 #define NANDFSR_OFFSET 0x64 #define NANDF1ECC_OFFSET 0x70 @@ -83,6 +80,9 @@ struct davinci_nand_pdata { /* platform_data */ /* Main and mirror bbt descriptor overrides */ struct nand_bbt_descr *bbt_td; struct nand_bbt_descr *bbt_md; + + /* Access timings */ + struct davinci_aemif_timing *timing; }; #endif /* __ARCH_ARM_DAVINCI_NAND_H */ diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 983da6e4554c..62b0858f68ca 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -172,6 +172,7 @@ #define DA8XX_LPSC1_UART2 13 #define DA8XX_LPSC1_LCDC 16 #define DA8XX_LPSC1_PWM 17 +#define DA850_LPSC1_MMC_SD1 18 #define DA8XX_LPSC1_ECAP 20 #define DA830_LPSC1_EQEP 21 #define DA850_LPSC1_TPTC2 21 diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h index c72064733123..5a681d880dcb 100644 --- a/arch/arm/mach-davinci/include/mach/tnetv107x.h +++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h @@ -33,6 +33,8 @@ #ifndef __ASSEMBLY__ #include <linux/serial_8250.h> +#include <linux/input/matrix_keypad.h> + #include <mach/mmc.h> #include <mach/nand.h> #include <mach/serial.h> @@ -41,6 +43,7 @@ struct tnetv107x_device_info { struct davinci_uart_config *serial_config; struct davinci_mmc_config *mmc_config[2]; /* 2 controllers */ struct davinci_nand_pdata *nand_config[4]; /* 4 chipsels */ + struct matrix_keypad_platform_data *keypad_config; }; extern struct platform_device tnetv107x_wdt_device; diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h index 15a6192ad6eb..47723e8d75a4 100644 --- a/arch/arm/mach-davinci/include/mach/uncompress.h +++ b/arch/arm/mach-davinci/include/mach/uncompress.h @@ -88,6 +88,8 @@ static inline void __arch_decomp_setup(unsigned long arch_id) /* DA8xx boards */ DEBUG_LL_DA8XX(davinci_da830_evm, 2); DEBUG_LL_DA8XX(davinci_da850_evm, 2); + DEBUG_LL_DA8XX(mityomapl138, 1); + DEBUG_LL_DA8XX(omapl138_hawkboard, 2); /* TNETV107x boards */ DEBUG_LL_TNETV107X(tnetv107x, 1); diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c index 864e60482c53..daeae06430b9 100644 --- a/arch/arm/mach-davinci/tnetv107x.c +++ b/arch/arm/mach-davinci/tnetv107x.c @@ -104,7 +104,7 @@ static u32 pll_ext_freq[] = { }; /* PSC control registers */ -static u32 psc_regs[] __initconst = { TNETV107X_PSC_BASE }; +static u32 psc_regs[] = { TNETV107X_PSC_BASE }; /* Host map for interrupt controller */ static u32 intc_host_map[] = { 0x01010000, 0x01010101, -1 }; @@ -581,7 +581,14 @@ static struct davinci_id ids[] = { .part_no = 0xb8a1, .manufacturer = 0x017, .cpu_id = DAVINCI_CPU_ID_TNETV107X, - .name = "tnetv107x rev1.0", + .name = "tnetv107x rev 1.0", + }, + { + .variant = 0x1, + .part_no = 0xb8a1, + .manufacturer = 0x017, + .cpu_id = DAVINCI_CPU_ID_TNETV107X, + .name = "tnetv107x rev 1.1/1.2", }, }; diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index f85c8da17e8b..3d7c59839abe 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -18,6 +18,7 @@ #include <linux/kernel.h> #include <linux/init.h> +#include <linux/clk.h> #include <linux/platform_device.h> #include <linux/gpio.h> #include <linux/i2c/pca953x.h> @@ -38,19 +39,37 @@ #include "mux.h" -#define AM35XX_EVM_PHY_MASK (0xF) #define AM35XX_EVM_MDIO_FREQUENCY (1000000) +static struct mdio_platform_data am3517_evm_mdio_pdata = { + .bus_freq = AM35XX_EVM_MDIO_FREQUENCY, +}; + +static struct resource am3517_mdio_resources[] = { + { + .start = AM35XX_IPSS_EMAC_BASE + AM35XX_EMAC_MDIO_OFFSET, + .end = AM35XX_IPSS_EMAC_BASE + AM35XX_EMAC_MDIO_OFFSET + + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device am3517_mdio_device = { + .name = "davinci_mdio", + .id = 0, + .num_resources = ARRAY_SIZE(am3517_mdio_resources), + .resource = am3517_mdio_resources, + .dev.platform_data = &am3517_evm_mdio_pdata, +}; + static struct emac_platform_data am3517_evm_emac_pdata = { - .phy_mask = AM35XX_EVM_PHY_MASK, - .mdio_max_freq = AM35XX_EVM_MDIO_FREQUENCY, .rmii_en = 1, }; static struct resource am3517_emac_resources[] = { { .start = AM35XX_IPSS_EMAC_BASE, - .end = AM35XX_IPSS_EMAC_BASE + 0x3FFFF, + .end = AM35XX_IPSS_EMAC_BASE + 0x2FFFF, .flags = IORESOURCE_MEM, }, { @@ -113,7 +132,6 @@ void am3517_evm_ethernet_init(struct emac_platform_data *pdata) pdata->ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET; pdata->ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET; pdata->ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET; - pdata->mdio_reg_offset = AM35XX_EMAC_MDIO_OFFSET; pdata->ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE; pdata->version = EMAC_VERSION_2; pdata->hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR; @@ -121,6 +139,9 @@ void am3517_evm_ethernet_init(struct emac_platform_data *pdata) pdata->interrupt_disable = am3517_disable_ethernet_int; am3517_emac_device.dev.platform_data = pdata; platform_device_register(&am3517_emac_device); + platform_device_register(&am3517_mdio_device); + clk_add_alias(NULL, dev_name(&am3517_mdio_device.dev), + NULL, &am3517_emac_device.dev); regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); regval = regval & (~(AM35XX_CPGMACSS_SW_RST)); |