diff options
| author | Jason Jin <Jason.jin@freescale.com> | 2012-08-10 18:23:10 +0800 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2012-09-12 16:50:07 -0400 |
| commit | e4204d37dfbfae5e176f6564242f33e7a7b59fe2 (patch) | |
| tree | d92cc6ba77c1fe23003dbd3c541c734bf9a80bd7 /arch | |
| parent | 8b207089bcbf20474355e29395e5631f96886c66 (diff) | |
ENGR00212262-3: Faraday:Enable the ADMA2 function for SDHC
This patch enable the ADMA2 function for the SDHC module used
on Faraday board. Please note that the ADMA address should be 16
bytes aligned other than 4 byte in the spec.
This patch also increased the SDHC module frequency to 200MHz.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mvf/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mvf/clock.c b/arch/arm/mach-mvf/clock.c index 71c51d5230c0..29cc445fc799 100644 --- a/arch/arm/mach-mvf/clock.c +++ b/arch/arm/mach-mvf/clock.c @@ -1727,7 +1727,7 @@ int __init mvf_clocks_init(unsigned long ckil, unsigned long osc, /*clk_set_parent(&enet_clk, &pll5_enet_main_clk);*/ clk_set_parent(&esdhc1_clk, &pll1_pfd3_396M); - clk_set_rate(&esdhc1_clk, 100000000); + clk_set_rate(&esdhc1_clk, 200000000); clk_set_parent(&dcu0_clk, &pll1_pfd2_452M); clk_set_rate(&dcu0_clk, 113000000); |