diff options
author | Pavan Kunapuli <pkunapuli@nvidia.com> | 2014-01-09 17:17:27 +0530 |
---|---|---|
committer | Harry Hong <hhong@nvidia.com> | 2014-01-27 22:25:54 -0800 |
commit | 0dcb526b0c6f7326b0081a4344c38f74b4a1e75c (patch) | |
tree | a03226799f2459e8107997c45305953219093b6d /arch | |
parent | 4a084ac0fb7e801a1ce24d099edf8eef3d79f5ad (diff) |
ARM: tegra: sdhci: Pass speedo id in platform data
Passing speedo id from sdhci platform data. Speedo id is required
for some calculation in auto tuning.
Set trim delay of SDMMC4 to 3 as per the characterization team
recommendations.
Bug 1423423
Reviewed-on: http://git-master/r/352307
(cherry picked from commit a628fadf080a26d5cedb528d083b1007217072a8)
Change-Id: Icfce5614d410e2770344897ace5c1a9adabca8d8
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/356524
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-tegra/board-dalmore-sdhci.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-macallan-sdhci.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-pluto-sdhci.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-roth-sdhci.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-tegranote7c-sdhci.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-tegratab-sdhci.c | 11 |
6 files changed, 61 insertions, 10 deletions
diff --git a/arch/arm/mach-tegra/board-dalmore-sdhci.c b/arch/arm/mach-tegra/board-dalmore-sdhci.c index 8319cc67ba74..f6ec07d2e7ba 100644 --- a/arch/arm/mach-tegra/board-dalmore-sdhci.c +++ b/arch/arm/mach-tegra/board-dalmore-sdhci.c @@ -2,7 +2,7 @@ * arch/arm/mach-tegra/board-dalmore-sdhci.c * * Copyright (C) 2010 Google, Inc. - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -38,7 +38,9 @@ #include "board.h" #include "board-dalmore.h" #include "dvfs.h" +#include "fuse.h" +#define FUSE_CORE_SPEEDO_0 0x134 #define DALMORE_WLAN_PWR TEGRA_GPIO_PCC5 #define DALMORE_WLAN_RST TEGRA_GPIO_PX7 #define DALMORE_WLAN_WOW TEGRA_GPIO_PU5 @@ -175,7 +177,7 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = { .power_gpio = -1, .is_8bit = 1, .tap_delay = 0x5, - .trim_delay = 0xA, + .trim_delay = 0x3, .ddr_clk_limit = 41000000, .max_clk_limit = 156000000, .mmc_data = { @@ -399,6 +401,7 @@ int __init dalmore_sdhci_init(void) int nominal_core_mv; int min_vcore_override_mv; int boot_vcore_mv; + int speedo; struct board_info board_info; nominal_core_mv = @@ -424,6 +427,12 @@ int __init dalmore_sdhci_init(void) tegra_sdhci_platform_data2.boot_vcore_mv = boot_vcore_mv; tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv; } + + speedo = tegra_fuse_readl(FUSE_CORE_SPEEDO_0); + tegra_sdhci_platform_data0.cpu_speedo = speedo; + tegra_sdhci_platform_data2.cpu_speedo = speedo; + tegra_sdhci_platform_data3.cpu_speedo = speedo; + if ((tegra_sdhci_platform_data3.uhs_mask & MMC_MASK_HS200) && (!(tegra_sdhci_platform_data3.uhs_mask & MMC_UHS_MASK_DDR50))) diff --git a/arch/arm/mach-tegra/board-macallan-sdhci.c b/arch/arm/mach-tegra/board-macallan-sdhci.c index 86f42d1d0625..dcef5e757c0f 100644 --- a/arch/arm/mach-tegra/board-macallan-sdhci.c +++ b/arch/arm/mach-tegra/board-macallan-sdhci.c @@ -1,7 +1,7 @@ /* * arch/arm/mach-tegra/board-macallan-sdhci.c * - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -35,7 +35,9 @@ #include "board.h" #include "board-macallan.h" #include "dvfs.h" +#include "fuse.h" +#define FUSE_CORE_SPEEDO_0 0x134 #define MACALLAN_SD_CD TEGRA_GPIO_PV2 #define MACALLAN_SD_WP TEGRA_GPIO_PQ4 #define MACALLAN_WLAN_PWR TEGRA_GPIO_PCC5 @@ -171,7 +173,7 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = { .power_gpio = -1, .is_8bit = 1, .tap_delay = 0x5, - .trim_delay = 0xA, + .trim_delay = 0x3, .ddr_clk_limit = 41000000, .max_clk_limit = 156000000, .mmc_data = { @@ -302,6 +304,7 @@ int __init macallan_sdhci_init(void) int nominal_core_mv; int min_vcore_override_mv; int boot_vcore_mv; + int speedo; nominal_core_mv = tegra_dvfs_rail_get_nominal_millivolts(tegra_core_rail); @@ -327,6 +330,11 @@ int __init macallan_sdhci_init(void) tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv; } + speedo = tegra_fuse_readl(FUSE_CORE_SPEEDO_0); + tegra_sdhci_platform_data0.cpu_speedo = speedo; + tegra_sdhci_platform_data2.cpu_speedo = speedo; + tegra_sdhci_platform_data3.cpu_speedo = speedo; + if ((tegra_sdhci_platform_data3.uhs_mask & MMC_MASK_HS200) && (!(tegra_sdhci_platform_data3.uhs_mask & MMC_UHS_MASK_DDR50))) diff --git a/arch/arm/mach-tegra/board-pluto-sdhci.c b/arch/arm/mach-tegra/board-pluto-sdhci.c index 2515134c3ce3..603d96c711d9 100644 --- a/arch/arm/mach-tegra/board-pluto-sdhci.c +++ b/arch/arm/mach-tegra/board-pluto-sdhci.c @@ -1,7 +1,7 @@ /* * arch/arm/mach-tegra/board-pluto-sdhci.c * - * Copyright (c) 2012-2013 NVIDIA Corporation. All rights reserved. + * Copyright (c) 2012-2014 NVIDIA Corporation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -35,7 +35,9 @@ #include "board.h" #include "board-pluto.h" #include "dvfs.h" +#include "fuse.h" +#define FUSE_CORE_SPEEDO_0 0x134 #define PLUTO_WLAN_PWR TEGRA_GPIO_PCC5 #define PLUTO_WLAN_WOW TEGRA_GPIO_PU5 #define PLUTO_SD_CD TEGRA_GPIO_PV2 @@ -191,7 +193,7 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = { .power_gpio = -1, .is_8bit = 1, .tap_delay = 0x5, - .trim_delay = 0xA, + .trim_delay = 0x3, .ddr_clk_limit = 41000000, .max_clk_limit = 156000000, .mmc_data = { @@ -330,6 +332,7 @@ int __init pluto_sdhci_init(void) int nominal_core_mv; int min_vcore_override_mv; int boot_vcore_mv; + int speedo; nominal_core_mv = tegra_dvfs_rail_get_boot_level(tegra_core_rail); @@ -355,6 +358,11 @@ int __init pluto_sdhci_init(void) tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv; } + speedo = tegra_fuse_readl(FUSE_CORE_SPEEDO_0); + tegra_sdhci_platform_data0.cpu_speedo = speedo; + tegra_sdhci_platform_data2.cpu_speedo = speedo; + tegra_sdhci_platform_data3.cpu_speedo = speedo; + if ((tegra_sdhci_platform_data3.uhs_mask & MMC_MASK_HS200) && (!(tegra_sdhci_platform_data3.uhs_mask & MMC_UHS_MASK_DDR50))) diff --git a/arch/arm/mach-tegra/board-roth-sdhci.c b/arch/arm/mach-tegra/board-roth-sdhci.c index 45d195f2950c..9488018afb1c 100644 --- a/arch/arm/mach-tegra/board-roth-sdhci.c +++ b/arch/arm/mach-tegra/board-roth-sdhci.c @@ -2,7 +2,7 @@ * arch/arm/mach-tegra/board-roth-sdhci.c * * Copyright (C) 2010 Google, Inc. - * Copyright (c) 2012-2013 NVIDIA Corporation. All rights reserved. + * Copyright (c) 2012-2014 NVIDIA Corporation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -37,7 +37,9 @@ #include "board.h" #include "board-roth.h" #include "dvfs.h" +#include "fuse.h" +#define FUSE_CORE_SPEEDO_0 0x134 #define ROTH_WLAN_PWR TEGRA_GPIO_PCC5 #define ROTH_WLAN_RST TEGRA_GPIO_INVALID #define ROTH_WLAN_WOW TEGRA_GPIO_PU5 @@ -172,7 +174,7 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = { .power_gpio = -1, .is_8bit = 1, .tap_delay = 0x5, - .trim_delay = 0xA, + .trim_delay = 0x3, .ddr_clk_limit = 41000000, .max_clk_limit = 156000000, .mmc_data = { @@ -422,6 +424,7 @@ int __init roth_sdhci_init(void) int nominal_core_mv; int min_vcore_override_mv; int boot_vcore_mv; + int speedo; nominal_core_mv = tegra_dvfs_rail_get_nominal_millivolts(tegra_core_rail); @@ -447,6 +450,11 @@ int __init roth_sdhci_init(void) tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv; } + speedo = tegra_fuse_readl(FUSE_CORE_SPEEDO_0); + tegra_sdhci_platform_data0.cpu_speedo = speedo; + tegra_sdhci_platform_data2.cpu_speedo = speedo; + tegra_sdhci_platform_data3.cpu_speedo = speedo; + if ((tegra_sdhci_platform_data3.uhs_mask & MMC_MASK_HS200) && (!(tegra_sdhci_platform_data3.uhs_mask & MMC_UHS_MASK_DDR50))) diff --git a/arch/arm/mach-tegra/board-tegranote7c-sdhci.c b/arch/arm/mach-tegra/board-tegranote7c-sdhci.c index b4d0bbfeb6f5..f0ce47902b8e 100644 --- a/arch/arm/mach-tegra/board-tegranote7c-sdhci.c +++ b/arch/arm/mach-tegra/board-tegranote7c-sdhci.c @@ -36,7 +36,9 @@ #include "board.h" #include "board-tegranote7c.h" #include "dvfs.h" +#include "fuse.h" +#define FUSE_CORE_SPEEDO_0 0x134 #define TEGRANOTE7C_SD_CD TEGRA_GPIO_PV2 #define TEGRANOTE7C_SD_WP TEGRA_GPIO_PQ4 #define TEGRANOTE7C_WLAN_PWR TEGRA_GPIO_PCC5 @@ -176,7 +178,7 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = { .power_gpio = -1, .is_8bit = 1, .tap_delay = 0x5, - .trim_delay = 0xA, + .trim_delay = 0x3, .ddr_clk_limit = 41000000, .max_clk_limit = 156000000, .mmc_data = { @@ -313,6 +315,8 @@ int __init tegranote7c_sdhci_init(void) int nominal_core_mv; int min_vcore_override_mv; int boot_vcore_mv; + int speedo; + nominal_core_mv = tegra_dvfs_rail_get_nominal_millivolts(tegra_core_rail); if (nominal_core_mv) { @@ -337,6 +341,11 @@ int __init tegranote7c_sdhci_init(void) tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv; } + speedo = tegra_fuse_readl(FUSE_CORE_SPEEDO_0); + tegra_sdhci_platform_data0.cpu_speedo = speedo; + tegra_sdhci_platform_data2.cpu_speedo = speedo; + tegra_sdhci_platform_data3.cpu_speedo = speedo; + tegra_sdhci_platform_data2.wp_gpio = -1; if ((tegra_sdhci_platform_data3.uhs_mask & MMC_MASK_HS200) && (!(tegra_sdhci_platform_data3.uhs_mask & MMC_UHS_MASK_DDR50))) diff --git a/arch/arm/mach-tegra/board-tegratab-sdhci.c b/arch/arm/mach-tegra/board-tegratab-sdhci.c index 7d2984fab1f2..1a94982144a6 100644 --- a/arch/arm/mach-tegra/board-tegratab-sdhci.c +++ b/arch/arm/mach-tegra/board-tegratab-sdhci.c @@ -36,7 +36,9 @@ #include "board.h" #include "board-tegratab.h" #include "dvfs.h" +#include "fuse.h" +#define FUSE_CORE_SPEEDO_0 0x134 #define TEGRATAB_SD_CD TEGRA_GPIO_PV2 #define TEGRATAB_SD_WP TEGRA_GPIO_PQ4 #define TEGRATAB_WLAN_PWR TEGRA_GPIO_PCC5 @@ -176,7 +178,7 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = { .power_gpio = -1, .is_8bit = 1, .tap_delay = 0x5, - .trim_delay = 0xA, + .trim_delay = 0x3, .ddr_clk_limit = 41000000, .max_clk_limit = 156000000, .mmc_data = { @@ -314,6 +316,8 @@ int __init tegratab_sdhci_init(void) int min_vcore_override_mv; int boot_vcore_mv; struct board_info board_info; + int speedo; + nominal_core_mv = tegra_dvfs_rail_get_nominal_millivolts(tegra_core_rail); if (nominal_core_mv) { @@ -338,6 +342,11 @@ int __init tegratab_sdhci_init(void) tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv; } + speedo = tegra_fuse_readl(FUSE_CORE_SPEEDO_0); + tegra_sdhci_platform_data0.cpu_speedo = speedo; + tegra_sdhci_platform_data2.cpu_speedo = speedo; + tegra_sdhci_platform_data3.cpu_speedo = speedo; + tegra_get_board_info(&board_info); if (board_info.board_id == BOARD_P1640 || board_info.board_id == BOARD_P1988) |