diff options
| author | Anson Huang <b20788@freescale.com> | 2015-07-22 00:40:00 +0800 |
|---|---|---|
| committer | Anson Huang <b20788@freescale.com> | 2015-07-22 18:53:57 +0800 |
| commit | f0c63b894a60512318481cb8a7b0777cdb7c46ab (patch) | |
| tree | b99754a1f4b6ef42f4c09bbc6b7f4f42e36ed887 /arch | |
| parent | ec42012c66961c357a1ed4c31d27f83a1db86611 (diff) | |
MLK-11268-2 ARM: imx: disconnect vddhigh and vddsnvs in dsm for imx6ul
Same as i.MX6SX, need to disconnect vddhigh and vddsnvs
in DSM on i.MX6UL, they have same design.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/anatop.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c index ee128e14d3cf..22c30081f020 100644 --- a/arch/arm/mach-imx/anatop.c +++ b/arch/arm/mach-imx/anatop.c @@ -49,7 +49,7 @@ #define BP_ANADIG_ANA_MISC2_REG1_STEP_TIME (26) /* Below MISC0_DISCON_HIGH_SNVS is only for i.MX6SL */ #define BM_ANADIG_ANA_MISC0_DISCON_HIGH_SNVS 0x2000 -/* i.MX6SX DISCON_HIGH_SNVS is changed to bit 12 */ +/* Since i.MX6SX, DISCON_HIGH_SNVS is changed to bit 12 */ #define BM_ANADIG_ANA_MISC0_V2_DISCON_HIGH_SNVS 0x1000 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x80000 #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x100000 @@ -86,7 +86,7 @@ static inline void imx_anatop_enable_2p5_pulldown(bool enable) static inline void imx_anatop_disconnect_high_snvs(bool enable) { - if (cpu_is_imx6sx()) + if (cpu_is_imx6sx() || cpu_is_imx6ul()) regmap_write(anatop, ANADIG_ANA_MISC0 + (enable ? REG_SET : REG_CLR), BM_ANADIG_ANA_MISC0_V2_DISCON_HIGH_SNVS); @@ -144,7 +144,7 @@ void imx_anatop_pre_suspend(void) imx_anatop_enable_fet_odrive(true); - if (cpu_is_imx6sl() || cpu_is_imx6sx()) + if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul()) imx_anatop_disconnect_high_snvs(true); } @@ -171,7 +171,7 @@ void imx_anatop_post_resume(void) imx_anatop_enable_fet_odrive(false); - if (cpu_is_imx6sl() || cpu_is_imx6sx()) + if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul()) imx_anatop_disconnect_high_snvs(false); } |