diff options
| author | Christian Hemp <c.hemp@phytec.de> | 2013-02-20 12:35:20 +0100 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2013-11-07 12:19:28 -0500 |
| commit | 22bb14746062bd57c4f601974ac2c4061bf0be94 (patch) | |
| tree | 45c520151c315e60555769a13dd6999cf0c743f1 /arch | |
| parent | a4aca8cb414442d01468dd03296bfff846e180cb (diff) | |
phyflex-imx6: add selection for phyCAM-P and S+
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_phyflex.c | 38 | ||||
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_phyflex.h | 4 |
2 files changed, 33 insertions, 9 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_phyflex.c b/arch/arm/mach-mx6/board-mx6q_phyflex.c index a3d3a11595d7..9d8bd16c3dd0 100644 --- a/arch/arm/mach-mx6/board-mx6q_phyflex.c +++ b/arch/arm/mach-mx6/board-mx6q_phyflex.c @@ -101,8 +101,9 @@ #define MX6_PHYFLEX_SD2_WP IMX_GPIO_NR(1, 2) /* GPIO PIN, sort by PORT/BIT */ -#define MX6_PHYFLEX_CAM_LVDS_PWRDN IMX_GPIO_NR(1, 24) +#define MX6_PHYFLEX_CAM0_LVDS_PWRDN IMX_GPIO_NR(1, 24) #define MX6_PHYFLEX_CAM0_OE IMX_GPIO_NR(5, 20) +#define MX6_PHYFLEX_CAM1_LVDS_PWRDN IMX_GPIO_NR(2, 28) #define MX6_PHYFLEX_CAM1_OE IMX_GPIO_NR(3, 10) #define MX6_PHYFLEX_LDB0_BACKLIGHT IMX_GPIO_NR(1, 8) @@ -149,6 +150,11 @@ #define ENABLE_HDMI #define ENABLE_PHY +static char* csi0 = "phyCAM-P"; +module_param(csi0, charp, S_IRUGO); + +static char* csi1 = "phyCAM-P"; +module_param(csi1, charp, S_IRUGO); void __init early_console_setup(unsigned long base, struct clk *clk); static struct clk *sata_clk; @@ -1236,14 +1242,34 @@ static void __init mx6_phyflex_init(void) i2c_register_board_info(2, camera_i2c, ARRAY_SIZE(camera_i2c)); #endif - gpio_request(MX6_PHYFLEX_CAM_LVDS_PWRDN, "CSI0<->LVDS bridge #PWDN"); - gpio_direction_output(MX6_PHYFLEX_CAM_LVDS_PWRDN, 0); - + gpio_request(MX6_PHYFLEX_CAM0_LVDS_PWRDN, "CSI0<->LVDS bridge #PWDN"); gpio_request(MX6_PHYFLEX_CAM0_OE, "IPU1/CSI0 camera #OE"); - gpio_direction_output(MX6_PHYFLEX_CAM0_OE, 0); + gpio_request(MX6_PHYFLEX_CAM1_LVDS_PWRDN, "CSI1<->LVDS bridge #PWDN"); gpio_request(MX6_PHYFLEX_CAM1_OE, "IPU2/CSI1 camera #OE"); - gpio_direction_output(MX6_PHYFLEX_CAM1_OE, 0); + + if (!strcmp("phyCAM-S+", csi0)) { + gpio_direction_output(MX6_PHYFLEX_CAM0_LVDS_PWRDN, 1); + gpio_direction_output(MX6_PHYFLEX_CAM0_OE, 1); + } else if (!strcmp("none", csi0)) { + gpio_direction_output(MX6_PHYFLEX_CAM0_LVDS_PWRDN, 0); + gpio_direction_output(MX6_PHYFLEX_CAM0_OE, 1); + } else { + gpio_direction_output(MX6_PHYFLEX_CAM0_LVDS_PWRDN, 0); + gpio_direction_output(MX6_PHYFLEX_CAM0_OE, 0); + } + + if (!strcmp("phyCAM-S+", csi1)) { + gpio_direction_output(MX6_PHYFLEX_CAM1_LVDS_PWRDN, 1); + gpio_direction_output(MX6_PHYFLEX_CAM1_OE, 1); + } else if (!strcmp("none", csi1)) { + gpio_direction_output(MX6_PHYFLEX_CAM1_LVDS_PWRDN, 0); + gpio_direction_output(MX6_PHYFLEX_CAM1_OE, 1); + } else { + gpio_direction_output(MX6_PHYFLEX_CAM1_LVDS_PWRDN, 0); + gpio_direction_output(MX6_PHYFLEX_CAM1_OE, 0); + } + imx_add_viv_gpu(&imx6_gpu_data, &imx6_gpu_pdata); imx6q_add_vpu(); diff --git a/arch/arm/mach-mx6/board-mx6q_phyflex.h b/arch/arm/mach-mx6/board-mx6q_phyflex.h index 9a0c8e4f9228..0499d2cb53c5 100644 --- a/arch/arm/mach-mx6/board-mx6q_phyflex.h +++ b/arch/arm/mach-mx6/board-mx6q_phyflex.h @@ -223,7 +223,7 @@ static iomux_v3_cfg_t mx6q_phytec_common_pads[] = { MX6Q_PAD_EIM_DA1__IPU2_CSI1_D_8, MX6Q_PAD_EIM_DA0__IPU2_CSI1_D_9, MX6Q_PAD_EIM_EB1__IPU2_CSI1_D_10, - MX6Q_PAD_EIM_EB0__IPU2_CSI1_D_11, + MX6Q_PAD_EIM_EB0__GPIO_2_28, MX6Q_PAD_EIM_A17__IPU2_CSI1_D_12, MX6Q_PAD_EIM_A18__IPU2_CSI1_D_13, MX6Q_PAD_EIM_A19__IPU2_CSI1_D_14, @@ -234,9 +234,7 @@ static iomux_v3_cfg_t mx6q_phytec_common_pads[] = { MX6Q_PAD_EIM_A24__IPU2_CSI1_D_19, /* Enable CAM1 clocking only if it is needed for camera 1 lvds */ -#if defined (CONFIG_CAM1_LVDS) MX6Q_PAD_NANDF_CS2__CCM_CLKO2, -#endif /* PCIE_PRSNT */ MX6Q_PAD_SD1_DAT3__GPIO_1_21, |