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authorChetan Kumar N G <chetankumarn@nvidia.com>2013-06-20 10:32:21 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 13:40:48 -0700
commit28f70d6aac0c3a14f7c041183660fa203557552f (patch)
treefe9b9ca6f4b2d3dd57f6a25e3172134a0a67aa0f /arch
parent42ba399120bbedb70c0fb57c598ab18f623c6feb (diff)
ARM: tegra: enable split mem config at runtime
This change is a part of the effort to enable runtime platform detection and reduce compile-time conditionals. Bug 1333554 Change-Id: I5dac33e6a3c8d2609fb57580658f05a2612e46df Signed-off-by: Chetan Kumar N G <chetankumarn@nvidia.com> Reviewed-on: http://git-master/r/252560 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/board-bonaire.c4
-rw-r--r--arch/arm/mach-tegra/common.c148
-rw-r--r--arch/arm/mach-tegra/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-tegra/iomap.h4
4 files changed, 74 insertions, 84 deletions
diff --git a/arch/arm/mach-tegra/board-bonaire.c b/arch/arm/mach-tegra/board-bonaire.c
index 87bbc16152c8..2ae8986fd750 100644
--- a/arch/arm/mach-tegra/board-bonaire.c
+++ b/arch/arm/mach-tegra/board-bonaire.c
@@ -641,11 +641,9 @@ static void __init tegra_bonaire_reserve(void)
#if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
#else
-#if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
- if (tegra_split_mem_active())
+ if (tegra_cpu_is_asim() && tegra_split_mem_active())
tegra_reserve(0, 0, 0);
else
-#endif
tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_16M);
#endif
}
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index a682e842ef4a..ab008fc8f4f4 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -168,9 +168,7 @@ static int pwr_i2c_clk = 400;
static u8 power_config;
static u8 display_config;
-#ifdef CONFIG_TEGRA_SIMULATION_SPLIT_MEM
static int tegra_split_mem_set;
-#endif
/*
* Storage for debug-macro.S's state.
@@ -1883,81 +1881,83 @@ void __init tegra_reserve(unsigned long carveout_size, unsigned long fb_size,
tegra_fb_size = fb_size;
}
-#ifdef CONFIG_TEGRA_SIMULATION_SPLIT_MEM
- if (tegra_split_mem_active()) {
- tegra_fb_start = TEGRA_ASIM_QT_FB_START;
- tegra_fb_size = TEGRA_ASIM_QT_FB_SIZE;
-
- if (tegra_vpr_size == 0) {
- tegra_carveout_start =
- TEGRA_ASIM_QT_CARVEOUT_VPR_DISABLED_START;
- tegra_carveout_size =
- TEGRA_ASIM_QT_CARVEOUT_VPR_DISABLED_SIZE;
- } else if (
- (tegra_vpr_start <
- TEGRA_ASIM_QT_FB_START +
- TEGRA_ASIM_QT_FB_SIZE) ||
- (tegra_vpr_start + tegra_vpr_size - 1 >
- TEGRA_ASIM_QT_FRONT_DOOR_MEM_START +
- TEGRA_ASIM_QT_FRONT_DOOR_MEM_SIZE - 1)) {
- /*
- * On ASIM/ASIM + QT with
- * CONFIG_TEGRA_SIMULATION_SPLIT_MEM enabled, the VPR
- * region needs to be within the front door memory
- * region. Moreover, the VPR region can't exist where
- * the framebuffer resides.
- */
- BUG();
- } else if (
- (tegra_vpr_start -
- (TEGRA_ASIM_QT_FB_START +
- TEGRA_ASIM_QT_FB_SIZE) <
- TEGRA_ASIM_QT_CARVEOUT_MIN_SIZE) &&
- (TEGRA_ASIM_QT_FRONT_DOOR_MEM_START +
- TEGRA_ASIM_QT_FRONT_DOOR_MEM_SIZE -
- (tegra_vpr_start + tegra_vpr_size) <
- TEGRA_ASIM_QT_CARVEOUT_MIN_SIZE)) {
- /*
- * The tegra ASIM/QT carveout has a min size:-
- * TEGRA_ASIM_QT_CARVEOUT_MIN_SIZE. All free regions in
- * front door mem are smaller than the min carveout
- * size. Therefore, we can't fit the carveout in front
- * door mem.
- */
- BUG();
- } else if (
- (tegra_vpr_start -
- (TEGRA_ASIM_QT_FB_START + TEGRA_ASIM_QT_FB_SIZE)) >=
- (TEGRA_ASIM_QT_FRONT_DOOR_MEM_START +
- TEGRA_ASIM_QT_FRONT_DOOR_MEM_SIZE -
- (tegra_vpr_start + tegra_vpr_size))) {
- /*
- * Place the tegra ASIM/QT carveout between the
- * framebuffer and VPR.
- */
- tegra_carveout_start =
- TEGRA_ASIM_QT_CARVEOUT_VPR_DISABLED_START;
- tegra_carveout_size = tegra_vpr_start -
- (TEGRA_ASIM_QT_FB_START +
- TEGRA_ASIM_QT_FB_SIZE);
- } else {
- /*
- * Place the tegra ASIM/QT carveout after VPR.
- */
- tegra_carveout_start = tegra_vpr_start + tegra_vpr_size;
- tegra_carveout_size =
+ if (tegra_cpu_is_asim()) {
+ if (tegra_split_mem_active()) {
+ tegra_fb_start = TEGRA_ASIM_QT_FB_START;
+ tegra_fb_size = TEGRA_ASIM_QT_FB_SIZE;
+
+ if (tegra_vpr_size == 0) {
+ tegra_carveout_start =
+ TEGRA_ASIM_QT_CARVEOUT_VPR_DISABLED_START;
+ tegra_carveout_size =
+ TEGRA_ASIM_QT_CARVEOUT_VPR_DISABLED_SIZE;
+ } else if (
+ (tegra_vpr_start <
+ TEGRA_ASIM_QT_FB_START +
+ TEGRA_ASIM_QT_FB_SIZE) ||
+ (tegra_vpr_start + tegra_vpr_size - 1 >
+ TEGRA_ASIM_QT_FRONT_DOOR_MEM_START +
+ TEGRA_ASIM_QT_FRONT_DOOR_MEM_SIZE - 1)) {
+ /*
+ * On ASIM/ASIM + QT with
+ * CONFIG_TEGRA_SIMULATION_SPLIT_MEM enabled,
+ * the VPR region needs to be within the front
+ * door memory region. Moreover, the VPR region
+ * can't exist where the framebuffer resides.
+ */
+ BUG();
+ } else if (
+ (tegra_vpr_start -
+ (TEGRA_ASIM_QT_FB_START +
+ TEGRA_ASIM_QT_FB_SIZE) <
+ TEGRA_ASIM_QT_CARVEOUT_MIN_SIZE) &&
+ (TEGRA_ASIM_QT_FRONT_DOOR_MEM_START +
+ TEGRA_ASIM_QT_FRONT_DOOR_MEM_SIZE -
+ (tegra_vpr_start + tegra_vpr_size) <
+ TEGRA_ASIM_QT_CARVEOUT_MIN_SIZE)) {
+ /*
+ * The tegra ASIM/QT carveout has a min size:-
+ * TEGRA_ASIM_QT_CARVEOUT_MIN_SIZE. All free
+ * regions in front door mem are smaller than
+ * the min carveout size. Therefore, we can't
+ * fit the carveout in front door mem.
+ */
+ BUG();
+ } else if (
+ (tegra_vpr_start -
+ (TEGRA_ASIM_QT_FB_START +
+ TEGRA_ASIM_QT_FB_SIZE)) >=
+ (TEGRA_ASIM_QT_FRONT_DOOR_MEM_START +
+ TEGRA_ASIM_QT_FRONT_DOOR_MEM_SIZE -
+ (tegra_vpr_start + tegra_vpr_size))) {
+ /*
+ * Place the tegra ASIM/QT carveout between the
+ * framebuffer and VPR.
+ */
+ tegra_carveout_start =
+ TEGRA_ASIM_QT_CARVEOUT_VPR_DISABLED_START;
+ tegra_carveout_size = tegra_vpr_start -
+ (TEGRA_ASIM_QT_FB_START +
+ TEGRA_ASIM_QT_FB_SIZE);
+ } else {
+ /*
+ * Place the tegra ASIM/QT carveout after VPR.
+ */
+ tegra_carveout_start = tegra_vpr_start +
+ tegra_vpr_size;
+ tegra_carveout_size =
TEGRA_ASIM_QT_FRONT_DOOR_MEM_START +
TEGRA_ASIM_QT_FRONT_DOOR_MEM_SIZE -
(tegra_vpr_start + tegra_vpr_size);
+ }
+ } else if (tegra_vpr_size != 0) {
+ /*
+ * VPR cannot work on ASIM/ASIM + QT if split mem is not
+ * enabled.
+ */
+ BUG();
}
- } else if (tegra_vpr_size != 0) {
- /*
- * VPR cannot work on ASIM/ASIM + QT if split mem is not
- * enabled.
- */
- BUG();
}
-#endif
if (tegra_fb_size)
tegra_grhost_aperture = tegra_fb_start;
@@ -2359,8 +2359,6 @@ static int __init enet_smsc911x_init(void)
rootfs_initcall(enet_smsc911x_init);
#endif
-#ifdef CONFIG_TEGRA_PRE_SILICON_SUPPORT
-#ifdef CONFIG_TEGRA_SIMULATION_SPLIT_MEM
int tegra_split_mem_active(void)
{
return tegra_split_mem_set;
@@ -2372,5 +2370,3 @@ static int __init set_tegra_split_mem(char *options)
return 0;
}
early_param("tegra_split_mem", set_tegra_split_mem);
-#endif
-#endif
diff --git a/arch/arm/mach-tegra/include/mach/hardware.h b/arch/arm/mach-tegra/include/mach/hardware.h
index 78bdc1e4a754..be2c2dac9d50 100644
--- a/arch/arm/mach-tegra/include/mach/hardware.h
+++ b/arch/arm/mach-tegra/include/mach/hardware.h
@@ -61,9 +61,7 @@ extern enum tegra_revision tegra_revision;
enum tegra_chipid tegra_get_chipid(void);
unsigned int tegra_get_minor_rev(void);
-#ifdef CONFIG_TEGRA_SIMULATION_SPLIT_MEM
int tegra_split_mem_active(void);
-#endif
#ifdef CONFIG_TEGRA_PRE_SILICON_SUPPORT
void tegra_get_netlist_revision(u32 *netlist, u32* patchid);
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h
index 74e80a58c801..a4ab354f492b 100644
--- a/arch/arm/mach-tegra/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2010 Google, Inc.
- * Copyright (C) 2011-2013, NVIDIA Corporation.
+ * Copyright (C) 2011-2013, NVIDIA Corporation. All rights reserved.
*
* Author:
* Colin Cross <ccross@google.com>
@@ -749,7 +749,6 @@ defined(CONFIG_ARCH_TEGRA_12x_SOC))
#define TEGRA_SIM_ETH_SIZE SZ_64K
#endif
-#ifdef CONFIG_TEGRA_SIMULATION_SPLIT_MEM
#define TEGRA_ASIM_QT_FRONT_DOOR_MEM_START 0x81000000
#define TEGRA_ASIM_QT_FRONT_DOOR_MEM_SIZE (SZ_256M - SZ_16M)
#define TEGRA_ASIM_QT_FB_START TEGRA_ASIM_QT_FRONT_DOOR_MEM_START
@@ -759,7 +758,6 @@ defined(CONFIG_ARCH_TEGRA_12x_SOC))
#define TEGRA_ASIM_QT_CARVEOUT_VPR_DISABLED_SIZE \
(TEGRA_ASIM_QT_FRONT_DOOR_MEM_SIZE - TEGRA_ASIM_QT_FB_SIZE)
#define TEGRA_ASIM_QT_CARVEOUT_MIN_SIZE SZ_128M
-#endif
#if defined(CONFIG_ARCH_TEGRA_2x_SOC) || defined(CONFIG_ARCH_TEGRA_3x_SOC) || \
defined(CONFIG_ARCH_TEGRA_11x_SOC) || defined(CONFIG_ARCH_TEGRA_14x_SOC)