diff options
author | Robin Gong <yibin.gong@nxp.com> | 2016-02-01 11:24:58 +0800 |
---|---|---|
committer | Robin Gong <yibin.gong@nxp.com> | 2016-02-01 16:46:26 +0800 |
commit | cc2761643a119c67bc202c3e9114b7be4260e55a (patch) | |
tree | e6c76ac81cfba64e216a48b4f55cf880a07420b3 /arch | |
parent | 9a8b14a06720cebfb0ba9d02b62770ef25e71c01 (diff) |
MLK-12350: ARM: anatop: disable PU regulator on i.mx6qp before suspend
To eliminate the power number, need turn off PU regulator before suspend
since it's turned on always on i.mx6qp.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 9adf58b30c7ad3ac5662c4ef766b029a9a01faa0)
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-imx/anatop.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c index 819e0b15d22c..d2b1e181c8e3 100644 --- a/arch/arm/mach-imx/anatop.c +++ b/arch/arm/mach-imx/anatop.c @@ -40,6 +40,8 @@ #define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG 0x40000 #define BM_ANADIG_REG_2P5_ENABLE_PULLDOWN 0x8 #define BM_ANADIG_REG_CORE_FET_ODRIVE 0x20000000 +#define BM_ANADIG_REG_CORE_REG1 (0x1f << 9) +#define BM_ANADIG_REG_CORE_REG2 (0x1f << 18) #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG 0x1000 #define BM_ANADIG_ANA_MISC0_V2_STOP_MODE_CONFIG 0x800 #define BM_ANADIG_ANA_MISC0_V3_STOP_MODE_CONFIG 0xc00 @@ -95,6 +97,23 @@ static inline void imx_anatop_disconnect_high_snvs(bool enable) BM_ANADIG_ANA_MISC0_DISCON_HIGH_SNVS); } +static void imx_anatop_disable_pu(bool off) +{ + u32 val, soc; + if (off) { + regmap_read(anatop, ANADIG_REG_CORE, &val); + val &= ~BM_ANADIG_REG_CORE_REG1; + regmap_write(anatop, ANADIG_REG_CORE, val); + } else { + /* track vddpu with vddsoc */ + regmap_read(anatop, ANADIG_REG_CORE, &val); + soc = val & BM_ANADIG_REG_CORE_REG2; + val &= ~BM_ANADIG_REG_CORE_REG1; + val |= soc >> 9; + regmap_write(anatop, ANADIG_REG_CORE, val); + } +} + void imx_anatop_pre_suspend(void) { if (cpu_is_imx7d()) { @@ -108,6 +127,9 @@ void imx_anatop_pre_suspend(void) return; } + if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0) + imx_anatop_disable_pu(true); + if ((imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2) && !imx_gpc_usb_wakeup_enabled()) imx_anatop_enable_2p5_pulldown(true); @@ -133,6 +155,9 @@ void imx_anatop_post_resume(void) return; } + if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0) + imx_anatop_disable_pu(false); + if ((imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2) && !imx_gpc_usb_wakeup_enabled()) imx_anatop_enable_2p5_pulldown(false); |