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authorChandler Zhang <chazhang@nvidia.com>2012-11-26 20:52:37 +0800
committerSimone Willett <swillett@nvidia.com>2012-11-27 12:33:24 -0800
commit382f0bbccafc0014940fec835054c03a0b0ab134 (patch)
tree4bc19958c9582f733f9b84bae26c072f87aa83c3 /arch
parent5fd55c38cd7ef297f9ad8cbeca2e0e1a5768582e (diff)
arm: tegra: pluto: fix LG 5'' panel timing
Horizental timing for LG 5'' panel was wrongly configured. Change to correct values to fix the glitch at left side. Bug 1156782 Bug 1175123 Bug 1180814 Change-Id: Ia1fb349ed824d883167c1253d68f471cb827b283 Signed-off-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-on: http://git-master/r/166200 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/board-pluto-panel.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/board-pluto-panel.c b/arch/arm/mach-tegra/board-pluto-panel.c
index 4ef6bf08383d..2db0e0588a20 100644
--- a/arch/arm/mach-tegra/board-pluto-panel.c
+++ b/arch/arm/mach-tegra/board-pluto-panel.c
@@ -655,11 +655,11 @@ static struct tegra_dc_mode pluto_dsi_modes[] = {
.v_ref_to_sync = 1,
.h_sync_width = 4,
.v_sync_width = 4,
- .h_back_porch = 82,
+ .h_back_porch = 112,
.v_back_porch = 7,
.h_active = 720,
.v_active = 1280,
- .h_front_porch = 4,
+ .h_front_porch = 12,
.v_front_porch = 20,
},
#endif