diff options
| author | Zhang Jiejing <jiejing.zhang@freescale.com> | 2012-03-30 19:22:03 +0800 |
|---|---|---|
| committer | Zhang Jiejing <jiejing.zhang@freescale.com> | 2012-03-30 19:23:06 +0800 |
| commit | 5bd4ed656ab79a84d498554dba64089eb22bef4c (patch) | |
| tree | 1ef23bcd0ec5c78a95d88b9fdf2ccdb3bebfa9af /arch | |
| parent | 5ef2a8d9db09d1428511484fa8603b281326cde1 (diff) | |
ENGR00178552 MX6XX_SABRESD: update pin mux for revB board.
update some pin mux of revB board.
fix i2c3 not work on sabre6q board, and change related pins.
Conflicts:
arch/arm/mach-mx6/board-mx6q_sabresd.h
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6dl_sabresd.h | 6 | ||||
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabresd.h | 17 |
2 files changed, 15 insertions, 8 deletions
diff --git a/arch/arm/mach-mx6/board-mx6dl_sabresd.h b/arch/arm/mach-mx6/board-mx6dl_sabresd.h index 613a3ee03b2f..b397163da06b 100644 --- a/arch/arm/mach-mx6/board-mx6dl_sabresd.h +++ b/arch/arm/mach-mx6/board-mx6dl_sabresd.h @@ -223,6 +223,12 @@ static iomux_v3_cfg_t mx6dl_sabresd_pads[] = { /* power off */ MX6DL_PAD_EIM_D29__GPIO_3_29, + /* CAP_TCH_INT1 */ + MX6DL_PAD_NANDF_CLE__GPIO_6_7, + + /* CAP_TCH_INT0 */ + MX6DL_PAD_NANDF_ALE__GPIO_6_8, + /* AUX_5V Enable */ MX6DL_PAD_NANDF_RB0__GPIO_6_10, diff --git a/arch/arm/mach-mx6/board-mx6q_sabresd.h b/arch/arm/mach-mx6/board-mx6q_sabresd.h index f586b23568f0..69c46f9727fc 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabresd.h +++ b/arch/arm/mach-mx6/board-mx6q_sabresd.h @@ -40,7 +40,6 @@ static iomux_v3_cfg_t mx6q_sabresd_pads[] = { /* ECSPI1 */ MX6Q_PAD_EIM_D17__ECSPI1_MISO, MX6Q_PAD_EIM_D18__ECSPI1_MOSI, - MX6Q_PAD_EIM_D19__GPIO_3_19, /*SS1*/ /* ENET */ MX6Q_PAD_ENET_MDIO__ENET_MDIO, @@ -60,6 +59,7 @@ static iomux_v3_cfg_t mx6q_sabresd_pads[] = { MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL, MX6Q_PAD_ENET_TX_EN__GPIO_1_28, /* Micrel RGMII Phy Interrupt */ MX6Q_PAD_EIM_D23__GPIO_3_23, /* RGMII reset */ + MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT, /* Internal connect for 1588 TS Clock */ /* GPIO1 */ MX6Q_PAD_ENET_RX_ER__GPIO_1_24, /* J9 - Microphone Detect */ @@ -105,6 +105,12 @@ static iomux_v3_cfg_t mx6q_sabresd_pads[] = { MX6Q_PAD_GPIO_5__GPIO_1_5, /* Volume Down */ MX6Q_PAD_EIM_D29__GPIO_3_29, /* power off */ + /* CAP_TCH_INT1 */ + MX6Q_PAD_NANDF_CLE__GPIO_6_7, + + /* CAP_TCH_INT0 */ + MX6Q_PAD_NANDF_ALE__GPIO_6_8, + /* eCompass int */ MX6Q_PAD_EIM_D16__GPIO_3_16, @@ -129,11 +135,7 @@ static iomux_v3_cfg_t mx6q_sabresd_pads[] = { /* I2C3 */ MX6Q_PAD_GPIO_3__I2C3_SCL, /* GPIO1[3] */ -#ifdef CONFIG_FEC_1588 - MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT, -#else - MX6Q_PAD_GPIO_16__I2C3_SDA, /* GPIO7[11]*/ -#endif + MX6Q_PAD_GPIO_6__I2C3_SDA, /* DISPLAY */ MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, @@ -247,8 +249,7 @@ static iomux_v3_cfg_t mx6q_sabresd_pads[] = { /*GPS AUX_3V15_EN*/ MX6Q_PAD_NANDF_WP_B__GPIO_6_9, - /* MPCIE_3V3 Enable */ - MX6Q_PAD_GPIO_6__GPIO_1_6, + MX6Q_PAD_EIM_D19__GPIO_3_19, /* PCIE_PWR_EN */ }; static iomux_v3_cfg_t mx6q_sabresd_csi0_sensor_pads[] = { |