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authorDongfang Shi <dshi@nvidia.com>2012-05-08 15:24:25 -0700
committerSimone Willett <swillett@nvidia.com>2012-06-12 17:17:46 -0700
commit4a5cfb62d9aa2abcd3c0ae63a76cafd77fb78ae3 (patch)
tree09200c08bf649e84397e1173e794803215a8d2fb /arch
parentc7d35b5a710eb5a2742a00e1726df43a7160f53b (diff)
arm: tegra: p1852: drive touch panel with resolution 1366x768
Enable WXGA display and touch input for p1852 touch panel. board-p1852-panel.c: added WXGA timing for atmel touch panel. board-p1852.c: initialize touch panel if touch input is defined. board-p1852.h: added p1852 touch panel GPIO and bus. tegra_p1852_gnu_linux_defconfig: added touch panel flags, not defined by default. bug 936232 Change-Id: Ia50b991f6aa5ed0ece458ad3871a68684a9234a6 Signed-off-by: Dongfang Shi <dshi@nvidia.com> Reviewed-on: http://git-master/r/101348 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/configs/tegra_p1852_gnu_linux_defconfig2
-rw-r--r--arch/arm/mach-tegra/board-p1852-panel.c59
-rw-r--r--arch/arm/mach-tegra/board-p1852.c112
-rw-r--r--arch/arm/mach-tegra/board-p1852.h6
4 files changed, 179 insertions, 0 deletions
diff --git a/arch/arm/configs/tegra_p1852_gnu_linux_defconfig b/arch/arm/configs/tegra_p1852_gnu_linux_defconfig
index 243eaffccec3..8103641aa929 100644
--- a/arch/arm/configs/tegra_p1852_gnu_linux_defconfig
+++ b/arch/arm/configs/tegra_p1852_gnu_linux_defconfig
@@ -219,3 +219,5 @@ CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRC_CCITT=y
CONFIG_LIBCRC32C=y
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
diff --git a/arch/arm/mach-tegra/board-p1852-panel.c b/arch/arm/mach-tegra/board-p1852-panel.c
index ee4c4671a48f..c104b913518e 100644
--- a/arch/arm/mach-tegra/board-p1852-panel.c
+++ b/arch/arm/mach-tegra/board-p1852-panel.c
@@ -39,6 +39,63 @@ static int p1852_panel_disable(void)
return 0;
}
+#ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
+
+static struct tegra_dc_mode p1852_panel_modes[] = {
+ {
+ /* 1366x768@60Hz */
+ .pclk = 74180000,
+ .h_ref_to_sync = 1,
+ .v_ref_to_sync = 1,
+ .h_sync_width = 30,
+ .v_sync_width = 5,
+ .h_back_porch = 52,
+ .v_back_porch = 20,
+ .h_active = 1366,
+ .v_active = 768,
+ .h_front_porch = 64,
+ .v_front_porch = 25,
+ },
+ {
+ /* 1366x768@50Hz */
+ .pclk = 74180000,
+ .h_ref_to_sync = 1,
+ .v_ref_to_sync = 1,
+ .h_sync_width = 30,
+ .v_sync_width = 5,
+ .h_back_porch = 56,
+ .v_back_porch = 80,
+ .h_active = 1366,
+ .v_active = 768,
+ .h_front_porch = 64,
+ .v_front_porch = 125,
+ },
+ {
+ /* 1366x768@48 */
+ .pclk = 74180000,
+ .h_ref_to_sync = 1,
+ .v_ref_to_sync = 1,
+ .h_sync_width = 30,
+ .v_sync_width = 5,
+ .h_back_porch = 52,
+ .v_back_porch = 98,
+ .h_active = 1366,
+ .v_active = 768,
+ .h_front_porch = 64,
+ .v_front_porch = 152,
+ },
+};
+
+static struct tegra_fb_data p1852_fb_data = {
+ .win = 0,
+ .xres = 1366,
+ .yres = 768,
+ .bits_per_pixel = 32,
+};
+
+#else
+
+/* Mode data for primary RGB/LVDS out */
static struct tegra_dc_mode p1852_panel_modes[] = {
{
/* 800x480@60 */
@@ -63,6 +120,8 @@ static struct tegra_fb_data p1852_fb_data = {
.bits_per_pixel = 32,
};
+#endif
+
static struct tegra_dc_out p1852_disp1_out = {
.align = TEGRA_DC_ALIGN_MSB,
.order = TEGRA_DC_ORDER_RED_BLUE,
diff --git a/arch/arm/mach-tegra/board-p1852.c b/arch/arm/mach-tegra/board-p1852.c
index 898e9246f981..a348dfe1cbc8 100644
--- a/arch/arm/mach-tegra/board-p1852.c
+++ b/arch/arm/mach-tegra/board-p1852.c
@@ -35,6 +35,9 @@
#include <linux/platform_data/tegra_nor.h>
#include <linux/spi/spi.h>
#include <linux/mtd/partitions.h>
+#if defined(CONFIG_TOUCHSCREEN_ATMEL_MXT)
+#include <linux/i2c/atmel_mxt_ts.h>
+#endif
#include <mach/clk.h>
#include <mach/iomap.h>
#include <mach/irqs.h>
@@ -345,6 +348,112 @@ static struct platform_device *p1852_devices[] __initdata = {
&tegra_wdt_device
};
+
+#ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
+
+#define MXT_CONFIG_CRC 0xD62DE8
+static const u8 config[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
+ 0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
+ 0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
+ 0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
+ 0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
+ 0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
+ 0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
+ 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+#define MXT_CONFIG_CRC_SKU2000 0xA24D9A
+static const u8 config_sku2000[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
+ 0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00, //23=thr 2 di
+ 0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
+ 0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, //0A=limit
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
+ 0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
+ 0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
+ 0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
+ 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+static struct mxt_platform_data atmel_mxt_info = {
+ .x_line = 27,
+ .y_line = 42,
+ .x_size = 768,
+ .y_size = 1366,
+ .blen = 0x20,
+ .threshold = 0x3C,
+ .voltage = 3300000, /* 3.3V */
+ .orient = 5,
+ .config = config,
+ .config_length = 157,
+ .config_crc = MXT_CONFIG_CRC,
+ .irqflags = IRQF_TRIGGER_FALLING,
+/* .read_chg = &read_chg, */
+ .read_chg = NULL,
+};
+
+static struct i2c_board_info __initdata atmel_i2c_info[] = {
+ {
+ I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
+ .irq = TEGRA_GPIO_TO_IRQ(TOUCH_GPIO_IRQ_ATMEL_T9),
+ .platform_data = &atmel_mxt_info,
+ }
+};
+
+static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
+ /* name parent rate enabled */
+ { "sbc1", "pll_p", 52000000, true},
+ { NULL, NULL, 0, 0},
+};
+
+static int __init p1852_touch_init(void)
+{
+ tegra_gpio_enable(TOUCH_GPIO_IRQ_ATMEL_T9);
+ tegra_gpio_enable(TOUCH_GPIO_RST_ATMEL_T9);
+
+ gpio_request(TOUCH_GPIO_IRQ_ATMEL_T9, "atmel-irq");
+ gpio_direction_input(TOUCH_GPIO_IRQ_ATMEL_T9);
+
+ gpio_request(TOUCH_GPIO_RST_ATMEL_T9, "atmel-reset");
+ gpio_direction_output(TOUCH_GPIO_RST_ATMEL_T9, 0);
+ msleep(1);
+ gpio_set_value(TOUCH_GPIO_RST_ATMEL_T9, 1);
+ msleep(100);
+
+ atmel_mxt_info.config = config_sku2000;
+ atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
+
+ i2c_register_board_info(TOUCH_BUS_ATMEL_T9, atmel_i2c_info, 1);
+
+ return 0;
+}
+
+#endif // CONFIG_TOUCHSCREEN_ATMEL_MXT
+
static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
.port_otg = false,
.has_hostpc = true,
@@ -473,6 +582,9 @@ static void __init tegra_p1852_init(void)
p1852_sdhci_init();
p1852_spi_init();
platform_add_devices(p1852_devices, ARRAY_SIZE(p1852_devices));
+#ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
+ p1852_touch_init();
+#endif
p1852_panel_init();
p1852_nor_init();
p1852_pcie_init();
diff --git a/arch/arm/mach-tegra/board-p1852.h b/arch/arm/mach-tegra/board-p1852.h
index f146f30ed2c5..1ac0968f9518 100644
--- a/arch/arm/mach-tegra/board-p1852.h
+++ b/arch/arm/mach-tegra/board-p1852.h
@@ -96,4 +96,10 @@ int p1852_panel_init(void);
int p1852_gpio_init(void);
int p1852_pins_state_init(void);
+#ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
+#define TOUCH_GPIO_IRQ_ATMEL_T9 TEGRA_GPIO_PEE1
+#define TOUCH_GPIO_RST_ATMEL_T9 TEGRA_GPIO_PW2
+#define TOUCH_BUS_ATMEL_T9 0
+#endif
+
#endif