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authorJeremy Linton <jeremy.linton@arm.com>2016-11-29 14:45:10 -0600
committerArnd Bergmann <arnd@arndb.de>2016-11-30 23:49:16 +0100
commit4c9456df8849204435c4de1849120b916975d75d (patch)
tree9dd2bb5f13f770fdda7758ca041aec993cfe11e2 /arch
parent6e631f6d354fd7d527de86b1bc7d94fabac862d6 (diff)
arm64: dts: juno: Correct PCI IO window
The PCIe root complex on Juno translates the MMIO mapped at 0x5f800000 to the PIO address range starting at 0 (which is common because PIO addresses are generally < 64k). Correct the DT to reflect this. Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/arm/juno-base.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 334271a25f70..7d3a2acc6a55 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -393,7 +393,7 @@
#address-cells = <3>;
#size-cells = <2>;
dma-coherent;
- ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>,
+ ranges = <0x01000000 0x00 0x00000000 0x00 0x5f800000 0x0 0x00800000>,
<0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
<0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
#interrupt-cells = <1>;