summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorMax Krummenacher <max.krummenacher@toradex.com>2018-06-28 18:43:27 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2018-12-24 01:27:33 +0100
commit0cf69d22721d74ddec9df7cb546e49399538c8d3 (patch)
tree68c083fbbcb348877d3f9330ed84ba748668aacb /arch
parent6dab5c483c9338648b40cbf330dd3db307ef09dd (diff)
ARM: dts: Coibri iMX6ULL: use wdog HW signal for reset
The i.MX6 ULL's watchdog is used to reset the SoC on reboot. The watchdog is configured to use the SoC's internal reset signal which does not generate a reset pulse on nRESET_OUT. Change the watchdog configuration to use a SoC external HW signal. This will additionally change the 'Reset cause' message from U-Boot from WDOG to POR. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index 25aad2654424..75d959c64284 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -514,6 +514,12 @@
MX6UL_PAD_GPIO1_IO03__REF_CLK_32K 0x14
>;
};
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
+ >;
+ };
};
};
@@ -628,3 +634,9 @@
assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
assigned-clock-rates = <0>, <198000000>;
};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+};