ARM: tegra: Enable cdev1 clk from board file

Enabling cdev1 clk or DAP Mclk from board file instead of
codec soc file because Mclk needs to be enabled before
codec initialization. Also exposing set_parent() for cdev
clocks so that it is possible to enable them from board
file.

Bug 827709
Bug 839210
Bug 821178

Change-Id: I6e0e15be9f9a2da98ce2ba89e3390bef1e2b93a7
Reviewed-on: http://git-master/r/37631
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

2 files changed, 26 insertions, 11 deletions

diff --git a/arch/arm/mach-tegra/board-ventana.c b/arch/arm/mach-tegra/board-ventana.c
index 329fb7c65a46..48644d36a87d 100644
--- a/arch/arm/mach-tegra/board-ventana.c
+++ b/arch/arm/mach-tegra/board-ventana.c
@@ -237,6 +237,7 @@ static __initdata struct tegra_clk_init_table ventana_clk_init_table[] = {
 	{ "pwm",	"clk_32k",	32768,		false},
 	{ "pll_a",	NULL,		56448000,	false},
 	{ "pll_a_out0",	NULL,		11289600,	false},
+	{ "clk_dev1",	"pll_a_out0",	0,		true},
 	{ "i2s1",	"pll_a_out0",	11289600,	false},
 	{ "i2s2",	"pll_a_out0",	11289600,	false},
 	{ "audio",	"pll_a_out0",	11289600,	false},
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index e1d85bb4f8be..3b1ba71e84d6 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -1226,25 +1226,38 @@ static struct clk_ops tegra_audio_sync_clk_ops = {
 };
 
 /* call this function after pinmux configuration */
-static void tegra2_cdev_clk_set_parent(struct clk *c)
+static int tegra2_cdev_clk_set_parent(struct clk *c, struct clk *p)
 {
 	const struct clk_mux_sel *mux = 0;
 	const struct clk_mux_sel *sel;
 	enum tegra_pingroup pg = TEGRA_PINGROUP_CDEV1;
 	int val;
 
-	/* Get pinmux setting for cdev1 and cdev2 from APB_MISC register */
-	if (!strcmp(c->name, "clk_dev2"))
-		pg = TEGRA_PINGROUP_CDEV2;
+	if (p) {
+		for (sel = c->inputs; sel->input != NULL; sel++) {
+			if (sel->input == p) {
+				clk_reparent(c, p);
+				return 0;
+			}
+		}
+	}
+	else {
+		/* Get pinmux setting for cdev1 and cdev2 from APB_MISC reg */
+		if (!strcmp(c->name, "clk_dev2"))
+			pg = TEGRA_PINGROUP_CDEV2;
 
-	val = tegra_pinmux_get_func(pg);
-	for (sel = c->inputs; sel->input != NULL; sel++) {
-		if (val == sel->value)
-			mux = sel;
+		val = tegra_pinmux_get_func(pg);
+		for (sel = c->inputs; sel->input != NULL; sel++) {
+			if (val == sel->value) {
+				mux = sel;
+				BUG_ON(!mux);
+				clk_reparent(c, mux->input);
+				return 0;
+			}
+		}
 	}
-	BUG_ON(!mux);
 
-	c->parent = mux->input;
+	return -EINVAL;
 }
 
 /* cdev1 and cdev2 (dap_mclk1 and dap_mclk2) ops */
@@ -1269,7 +1282,7 @@ static int tegra2_cdev_clk_enable(struct clk *c)
 {
 	if (!c->parent) {
 		/* Set parent from inputs */
-		tegra2_cdev_clk_set_parent(c);
+		tegra2_cdev_clk_set_parent(c, NULL);
 		clk_enable(c->parent);
 	}
 
@@ -1288,6 +1301,7 @@ static struct clk_ops tegra_cdev_clk_ops = {
 	.init			= &tegra2_cdev_clk_init,
 	.enable			= &tegra2_cdev_clk_enable,
 	.disable		= &tegra2_cdev_clk_disable,
+	.set_parent		= &tegra2_cdev_clk_set_parent,
 };
 
 /* shared bus ops */