diff options
author | yagi <yagi@ke66.alps.lineo.co.jp> | 2012-05-31 23:03:17 +0900 |
---|---|---|
committer | Justin Waters <justin.waters@timesys.com> | 2012-07-03 17:15:01 -0400 |
commit | 849dc517a49a1336099af4b13eacc5a2e061b82d (patch) | |
tree | 13b4c967a2c8e9e8d145d82e8f5b28ca89aade30 /arch | |
parent | 4e277ee03991688eb3884d32952562898c72d82d (diff) |
update: compile board-twr_vf600.c
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-mvf/board-twr_vf600.c | 1821 | ||||
-rw-r--r-- | arch/arm/mach-mvf/cpu.c | 105 | ||||
-rw-r--r-- | arch/arm/mach-mvf/cpu_op-mvf.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-mvf/cpu_op-mvf.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-mvf/devices-mvf.h (renamed from arch/arm/mach-mvf/devices-vf6xx.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-mvf/mvf_fec.c (renamed from arch/arm/mach-mvf/mx6_fec.c) | 4 |
6 files changed, 109 insertions, 1849 deletions
diff --git a/arch/arm/mach-mvf/board-twr_vf600.c b/arch/arm/mach-mvf/board-twr_vf600.c index a211399604e3..3c87ebbc3e5e 100644 --- a/arch/arm/mach-mvf/board-twr_vf600.c +++ b/arch/arm/mach-mvf/board-twr_vf600.c @@ -61,7 +61,6 @@ #include <mach/memory.h> #include <mach/imx-uart.h> #include <mach/viv_gpu.h> -#include <mach/ahci_sata.h> #include <mach/ipu-v3.h> #include <mach/mxc_hdmi.h> #include <mach/mxc_asrc.h> @@ -75,7 +74,7 @@ #include <asm/mach/time.h> //#include "usb.h" -#include "devices-vf6xx.h" +#include "devices-mvf.h" #include "crm_regs.h" //#include "cpu_op-mvf.h" #include "board-twr_vf600.h" @@ -155,9 +154,6 @@ #define BMCR_PDOWN 0x0800 /* PHY Powerdown */ void __init early_console_setup(unsigned long base, struct clk *clk); -static struct clk *sata_clk; -static int esai_record; -static int sgtl5000_en; static int spdif_en; static int flexcan_en; static int disable_mipi_dsi; @@ -169,168 +165,6 @@ extern int epdc_enabled; extern void mx6_cpu_regulator_init(void); static int max17135_regulator_init(struct max17135 *max17135); -enum sd_pad_mode { - SD_PAD_MODE_LOW_SPEED, - SD_PAD_MODE_MED_SPEED, - SD_PAD_MODE_HIGH_SPEED, -}; - -static int plt_sd3_pad_change(int clock) -{ - static enum sd_pad_mode pad_mode = SD_PAD_MODE_LOW_SPEED; - - iomux_v3_cfg_t *sd3_pads_200mhz = NULL; - iomux_v3_cfg_t *sd3_pads_100mhz = NULL; - iomux_v3_cfg_t *sd3_pads_50mhz = NULL; - - u32 sd3_pads_200mhz_cnt; - u32 sd3_pads_100mhz_cnt; - u32 sd3_pads_50mhz_cnt; - - if (cpu_is_mx6q()) { - sd3_pads_200mhz = mx6q_sd3_200mhz; - sd3_pads_100mhz = mx6q_sd3_100mhz; - sd3_pads_50mhz = mx6q_sd3_50mhz; - - sd3_pads_200mhz_cnt = ARRAY_SIZE(mx6q_sd3_200mhz); - sd3_pads_100mhz_cnt = ARRAY_SIZE(mx6q_sd3_100mhz); - sd3_pads_50mhz_cnt = ARRAY_SIZE(mx6q_sd3_50mhz); - } else if (cpu_is_mx6dl()) { - sd3_pads_200mhz = mx6dl_sd3_200mhz; - sd3_pads_100mhz = mx6dl_sd3_100mhz; - sd3_pads_50mhz = mx6dl_sd3_50mhz; - - sd3_pads_200mhz_cnt = ARRAY_SIZE(mx6dl_sd3_200mhz); - sd3_pads_100mhz_cnt = ARRAY_SIZE(mx6dl_sd3_100mhz); - sd3_pads_50mhz_cnt = ARRAY_SIZE(mx6dl_sd3_50mhz); - } - - if (clock > 100000000) { - if (pad_mode == SD_PAD_MODE_HIGH_SPEED) - return 0; - BUG_ON(!sd3_pads_200mhz); - pad_mode = SD_PAD_MODE_HIGH_SPEED; - return mxc_iomux_v3_setup_multiple_pads(sd3_pads_200mhz, - sd3_pads_200mhz_cnt); - } else if (clock > 52000000) { - if (pad_mode == SD_PAD_MODE_MED_SPEED) - return 0; - BUG_ON(!sd3_pads_100mhz); - pad_mode = SD_PAD_MODE_MED_SPEED; - return mxc_iomux_v3_setup_multiple_pads(sd3_pads_100mhz, - sd3_pads_100mhz_cnt); - } else { - if (pad_mode == SD_PAD_MODE_LOW_SPEED) - return 0; - BUG_ON(!sd3_pads_50mhz); - pad_mode = SD_PAD_MODE_LOW_SPEED; - return mxc_iomux_v3_setup_multiple_pads(sd3_pads_50mhz, - sd3_pads_50mhz_cnt); - } -} - -static int plt_sd4_pad_change(int clock) -{ - static enum sd_pad_mode pad_mode = SD_PAD_MODE_LOW_SPEED; - - iomux_v3_cfg_t *sd4_pads_200mhz = NULL; - iomux_v3_cfg_t *sd4_pads_100mhz = NULL; - iomux_v3_cfg_t *sd4_pads_50mhz = NULL; - - u32 sd4_pads_200mhz_cnt; - u32 sd4_pads_100mhz_cnt; - u32 sd4_pads_50mhz_cnt; - - if (cpu_is_mx6q()) { - sd4_pads_200mhz = mx6q_sd4_200mhz; - sd4_pads_100mhz = mx6q_sd4_100mhz; - sd4_pads_50mhz = mx6q_sd4_50mhz; - - sd4_pads_200mhz_cnt = ARRAY_SIZE(mx6q_sd4_200mhz); - sd4_pads_100mhz_cnt = ARRAY_SIZE(mx6q_sd4_100mhz); - sd4_pads_50mhz_cnt = ARRAY_SIZE(mx6q_sd4_50mhz); - } else if (cpu_is_mx6dl()) { - sd4_pads_200mhz = mx6dl_sd4_200mhz; - sd4_pads_100mhz = mx6dl_sd4_100mhz; - sd4_pads_50mhz = mx6dl_sd4_50mhz; - - sd4_pads_200mhz_cnt = ARRAY_SIZE(mx6dl_sd4_200mhz); - sd4_pads_100mhz_cnt = ARRAY_SIZE(mx6dl_sd4_100mhz); - sd4_pads_50mhz_cnt = ARRAY_SIZE(mx6dl_sd4_50mhz); - } - - if (clock > 100000000) { - if (pad_mode == SD_PAD_MODE_HIGH_SPEED) - return 0; - - pad_mode = SD_PAD_MODE_HIGH_SPEED; - return mxc_iomux_v3_setup_multiple_pads(sd4_pads_200mhz, - sd4_pads_200mhz_cnt); - } else if (clock > 52000000) { - if (pad_mode == SD_PAD_MODE_MED_SPEED) - return 0; - - pad_mode = SD_PAD_MODE_MED_SPEED; - return mxc_iomux_v3_setup_multiple_pads(sd4_pads_100mhz, - sd4_pads_100mhz_cnt); - } else { - if (pad_mode == SD_PAD_MODE_LOW_SPEED) - return 0; - - pad_mode = SD_PAD_MODE_LOW_SPEED; - return mxc_iomux_v3_setup_multiple_pads(sd4_pads_50mhz, - sd4_pads_50mhz_cnt); - } -} - -static const struct esdhc_platform_data mx6_arm2_sd3_data __initconst = { - .cd_gpio = MX6_ARM2_SD3_CD, - .wp_gpio = MX6_ARM2_SD3_WP, - .support_18v = 1, - .support_8bit = 1, - .keep_power_at_suspend = 1, - .delay_line = 0, - .platform_pad_change = plt_sd3_pad_change, -}; - -/* No card detect signal for SD4 on ARM2 board*/ -static const struct esdhc_platform_data mx6_arm2_sd4_data __initconst = { - .always_present = 1, - .support_8bit = 1, - .keep_power_at_suspend = 1, - .platform_pad_change = plt_sd4_pad_change, -}; - -static int __init gpmi_nand_platform_init(void) -{ - iomux_v3_cfg_t *nand_pads = NULL; - u32 nand_pads_cnt; - - if (cpu_is_mx6q()) { - nand_pads = mx6q_gpmi_nand; - nand_pads_cnt = ARRAY_SIZE(mx6dl_gpmi_nand); - } else if (cpu_is_mx6dl()) { - nand_pads = mx6dl_gpmi_nand; - nand_pads_cnt = ARRAY_SIZE(mx6dl_gpmi_nand); - - } - BUG_ON(!nand_pads); - return mxc_iomux_v3_setup_multiple_pads(nand_pads, nand_pads_cnt); -} - -static const struct gpmi_nand_platform_data -mx6_gpmi_nand_platform_data __initconst = { - .platform_init = gpmi_nand_platform_init, - .min_prop_delay_in_ns = 5, - .max_prop_delay_in_ns = 9, - .max_chip_count = 1, - .enable_bbt = 1, -}; - -static const struct anatop_thermal_platform_data - mx6_arm2_anatop_thermal_data __initconst = { - .name = "anatop_thermal", -}; static const struct imxuart_platform_data mx6_arm2_uart1_data __initconst = { .flags = IMXUART_HAVE_RTSCTS | IMXUART_USE_DCEDTE | IMXUART_SDMA, @@ -344,7 +178,7 @@ static inline void twr_vf600_init_uart(void) imx6q_add_imx_uart(1, &mx6_arm2_uart1_data); } -static int mx6_arm2_fec_phy_init(struct phy_device *phydev) +static int twr_vf600_fec_phy_init(struct phy_device *phydev) { unsigned short val; @@ -371,7 +205,7 @@ static int mx6_arm2_fec_phy_init(struct phy_device *phydev) return 0; } -static int mx6_arm2_fec_power_hibernate(struct phy_device *phydev) +static int twr_vf600_fec_power_hibernate(struct phy_device *phydev) { unsigned short val; @@ -386,1460 +220,24 @@ static int mx6_arm2_fec_power_hibernate(struct phy_device *phydev) } static struct fec_platform_data fec_data __initdata = { - .init = mx6_arm2_fec_phy_init, - .power_hibernate = mx6_arm2_fec_power_hibernate, + .init = twr_vf600_fec_phy_init, + .power_hibernate = twr_vf600_fec_power_hibernate, .phy = PHY_INTERFACE_MODE_RGMII, }; -static int mx6_arm2_spi_cs[] = { - MX6_ARM2_ECSPI1_CS0, - MX6_ARM2_ECSPI1_CS1, -}; - -static const struct spi_imx_master mx6_arm2_spi_data __initconst = { - .chipselect = mx6_arm2_spi_cs, - .num_chipselect = ARRAY_SIZE(mx6_arm2_spi_cs), -}; - -#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) -static struct mtd_partition m25p32_partitions[] = { - { - .name = "bootloader", - .offset = 0, - .size = 0x00040000, - }, { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct flash_platform_data m25p32_spi_flash_data = { - .name = "m25p32", - .parts = m25p32_partitions, - .nr_parts = ARRAY_SIZE(m25p32_partitions), - .type = "m25p32", -}; -#endif - -static struct spi_board_info m25p32_spi0_board_info[] __initdata = { -#if defined(CONFIG_MTD_M25P80) - { - /* The modalias must be the same as spi device driver name */ - .modalias = "m25p80", - .max_speed_hz = 20000000, - .bus_num = 0, - .chip_select = 1, - .platform_data = &m25p32_spi_flash_data, - }, -#endif -}; - -static void spi_device_init(void) -{ - spi_register_board_info(m25p32_spi0_board_info, - ARRAY_SIZE(m25p32_spi0_board_info)); -} - -static int max7310_1_setup(struct i2c_client *client, - unsigned gpio_base, unsigned ngpio, - void *context) -{ - int max7310_gpio_value[] = { 0, 1, 0, 1, 0, 0, 0, 0 }; - - int n; - - for (n = 0; n < ARRAY_SIZE(max7310_gpio_value); ++n) { - gpio_request(gpio_base + n, "MAX7310 1 GPIO Expander"); - if (max7310_gpio_value[n] < 0) - gpio_direction_input(gpio_base + n); - else - gpio_direction_output(gpio_base + n, - max7310_gpio_value[n]); - gpio_export(gpio_base + n, 0); - } - - return 0; -} - -static struct pca953x_platform_data max7310_platdata = { - .gpio_base = MX6_ARM2_MAX7310_1_BASE_ADDR, - .invert = 0, - .setup = max7310_1_setup, -}; - -static int max7310_u48_setup(struct i2c_client *client, - unsigned gpio_base, unsigned ngpio, - void *context) -{ - int max7310_gpio_value[] = { 1, 1, 1, 1, 0, 1, 0, 0 }; - - int n; - - for (n = 0; n < ARRAY_SIZE(max7310_gpio_value); ++n) { - gpio_request(gpio_base + n, "MAX7310 U48 GPIO Expander"); - if (max7310_gpio_value[n] < 0) - gpio_direction_input(gpio_base + n); - else - gpio_direction_output(gpio_base + n, - max7310_gpio_value[n]); - gpio_export(gpio_base + n, 0); - } - - return 0; -} - -static struct pca953x_platform_data max7310_u48_platdata = { - .gpio_base = MX6_ARM2_MAX7310_2_BASE_ADDR, - .invert = 0, - .setup = max7310_u48_setup, -}; - -static void ddc_dvi_init(void) -{ - /* enable DVI I2C */ - gpio_set_value(MX6_ARM2_DISP0_I2C_EN, 1); - - /* DISP0 Detect */ - gpio_request(MX6_ARM2_DISP0_DET_INT, "disp0-detect"); - gpio_direction_input(MX6_ARM2_DISP0_DET_INT); -} - -static int ddc_dvi_update(void) -{ - /* DVI cable state */ - if (gpio_get_value(MX6_ARM2_DISP0_DET_INT) == 1) - return 1; - return 0; -} - -static struct fsl_mxc_dvi_platform_data sabr_ddc_dvi_data = { - .ipu_id = 0, - .disp_id = 0, - .init = ddc_dvi_init, - .update = ddc_dvi_update, -}; - -static void mx6_csi0_io_init(void) -{ - if (0 == sgtl5000_en) { - iomux_v3_cfg_t *sensor_pads = NULL; - u32 sensor_pads_cnt; - - if (cpu_is_mx6q()) { - sensor_pads = mx6q_arm2_csi0_sensor_pads; - sensor_pads_cnt = \ - ARRAY_SIZE(mx6q_arm2_csi0_sensor_pads); - } else if (cpu_is_mx6dl()) { - sensor_pads = mx6dl_arm2_csi0_sensor_pads; - sensor_pads_cnt = \ - ARRAY_SIZE(mx6dl_arm2_csi0_sensor_pads); - } - - BUG_ON(!sensor_pads); - mxc_iomux_v3_setup_multiple_pads(sensor_pads, sensor_pads_cnt); - } - /* Camera reset */ - gpio_request(MX6_ARM2_CSI0_RST, "cam-reset"); - gpio_direction_output(MX6_ARM2_CSI0_RST, 1); - - /* Camera power down */ - gpio_request(MX6_ARM2_CSI0_PWN, "cam-pwdn"); - gpio_direction_output(MX6_ARM2_CSI0_PWN, 1); - msleep(1); - gpio_set_value(MX6_ARM2_CSI0_PWN, 0); - - /* For MX6Q: - * GPR1 bit19 and bit20 meaning: - * Bit19: 0 - Enable mipi to IPU1 CSI0 - * virtual channel is fixed to 0 - * 1 - Enable parallel interface to IPU1 CSI0 - * Bit20: 0 - Enable mipi to IPU2 CSI1 - * virtual channel is fixed to 3 - * 1 - Enable parallel interface to IPU2 CSI1 - * IPU1 CSI1 directly connect to mipi csi2, - * virtual channel is fixed to 1 - * IPU2 CSI0 directly connect to mipi csi2, - * virtual channel is fixed to 2 - * - * For MX6DL: - * GPR1 bit 21 and GPR13 bit 0-5, RM has detail information - */ - if (cpu_is_mx6q()) - mxc_iomux_set_gpr_register(1, 19, 1, 1); - else if (cpu_is_mx6dl()) - mxc_iomux_set_gpr_register(13, 0, 3, 4); -} - -static struct fsl_mxc_camera_platform_data camera_data = { - .analog_regulator = "DA9052_LDO7", - .core_regulator = "DA9052_LDO9", - .mclk = 24000000, - .csi = 0, - .io_init = mx6_csi0_io_init, -}; - -static void mx6_csi0_tvin_io_init(void) -{ - if (0 == sgtl5000_en) { - iomux_v3_cfg_t *tvin_pads = NULL; - u32 tvin_pads_cnt; - - if (cpu_is_mx6q()) { - tvin_pads = mx6q_arm2_csi0_tvin_pads; - tvin_pads_cnt = \ - ARRAY_SIZE(mx6q_arm2_csi0_tvin_pads); - } else if (cpu_is_mx6dl()) { - tvin_pads = mx6dl_arm2_csi0_tvin_pads; - tvin_pads_cnt = \ - ARRAY_SIZE(mx6dl_arm2_csi0_tvin_pads); - } - - BUG_ON(!tvin_pads); - mxc_iomux_v3_setup_multiple_pads(tvin_pads, tvin_pads_cnt); - } - /* Tvin reset */ - gpio_request(MX6_ARM2_CSI0_RST_TVIN, "tvin-reset"); - gpio_direction_output(MX6_ARM2_CSI0_RST_TVIN, 1); - - /* Tvin power down */ - gpio_request(MX6_ARM2_CSI0_PWN, "cam-pwdn"); - gpio_direction_output(MX6_ARM2_CSI0_PWN, 0); - msleep(1); - gpio_set_value(MX6_ARM2_CSI0_PWN, 1); - - if (cpu_is_mx6q()) - mxc_iomux_set_gpr_register(1, 19, 1, 1); - else if (cpu_is_mx6dl()) - mxc_iomux_set_gpr_register(13, 0, 3, 4); -} - -static struct fsl_mxc_tvin_platform_data tvin_data = { - .io_init = mx6_csi0_tvin_io_init, - .cvbs = false, -}; - -static void mx6_mipi_sensor_io_init(void) -{ - iomux_v3_cfg_t *mipi_sensor_pads = NULL; - u32 mipi_sensor_pads_cnt; - - if (cpu_is_mx6q()) { - mipi_sensor_pads = mx6q_arm2_mipi_sensor_pads; - mipi_sensor_pads_cnt = ARRAY_SIZE(mx6q_arm2_mipi_sensor_pads); - } else if (cpu_is_mx6dl()) { - mipi_sensor_pads = mx6dl_arm2_mipi_sensor_pads; - mipi_sensor_pads_cnt = ARRAY_SIZE(mx6dl_arm2_mipi_sensor_pads); - - } - BUG_ON(!mipi_sensor_pads); - mxc_iomux_v3_setup_multiple_pads(mipi_sensor_pads, - mipi_sensor_pads_cnt); - - if (cpu_is_mx6q()) - mxc_iomux_set_gpr_register(1, 19, 1, 0); - if (cpu_is_mx6dl()) - mxc_iomux_set_gpr_register(13, 0, 3, 0); -} - -static struct fsl_mxc_camera_platform_data ov5640_mipi_data = { - .mclk = 24000000, - .csi = 0, - .io_init = mx6_mipi_sensor_io_init, -}; - -static struct mxc_audio_codec_platform_data cs42888_data = { - .rates = (SNDRV_PCM_RATE_44100 | - SNDRV_PCM_RATE_88200 | - SNDRV_PCM_RATE_176400), -}; - -#define mV_to_uV(mV) (mV * 1000) -#define uV_to_mV(uV) (uV / 1000) -#define V_to_uV(V) (mV_to_uV(V * 1000)) -#define uV_to_V(uV) (uV_to_mV(uV) / 1000) - -static struct regulator_consumer_supply display_consumers[] = { - { - /* MAX17135 */ - .supply = "DISPLAY", - }, -}; - -static struct regulator_consumer_supply vcom_consumers[] = { - { - /* MAX17135 */ - .supply = "VCOM", - }, -}; - -static struct regulator_consumer_supply v3p3_consumers[] = { - { - /* MAX17135 */ - .supply = "V3P3", - }, -}; - -static struct regulator_init_data max17135_init_data[] = { - { - .constraints = { - .name = "DISPLAY", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(display_consumers), - .consumer_supplies = display_consumers, - }, { - .constraints = { - .name = "GVDD", - .min_uV = V_to_uV(20), - .max_uV = V_to_uV(20), - }, - }, { - .constraints = { - .name = "GVEE", - .min_uV = V_to_uV(-22), - .max_uV = V_to_uV(-22), - }, - }, { - .constraints = { - .name = "HVINN", - .min_uV = V_to_uV(-22), - .max_uV = V_to_uV(-22), - }, - }, { - .constraints = { - .name = "HVINP", - .min_uV = V_to_uV(20), - .max_uV = V_to_uV(20), - }, - }, { - .constraints = { - .name = "VCOM", - .min_uV = mV_to_uV(-4325), - .max_uV = mV_to_uV(-500), - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(vcom_consumers), - .consumer_supplies = vcom_consumers, - }, { - .constraints = { - .name = "VNEG", - .min_uV = V_to_uV(-15), - .max_uV = V_to_uV(-15), - }, - }, { - .constraints = { - .name = "VPOS", - .min_uV = V_to_uV(15), - .max_uV = V_to_uV(15), - }, - }, { - .constraints = { - .name = "V3P3", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(v3p3_consumers), - .consumer_supplies = v3p3_consumers, - }, -}; - -static struct platform_device max17135_sensor_device = { - .name = "max17135_sensor", - .id = 0, -}; - -static struct max17135_platform_data max17135_pdata __initdata = { - .vneg_pwrup = 1, - .gvee_pwrup = 1, - .vpos_pwrup = 2, - .gvdd_pwrup = 1, - .gvdd_pwrdn = 1, - .vpos_pwrdn = 2, - .gvee_pwrdn = 1, - .vneg_pwrdn = 1, - .gpio_pmic_pwrgood = MX6DL_ARM2_EPDC_PWRSTAT, - .gpio_pmic_vcom_ctrl = MX6DL_ARM2_EPDC_VCOM, - .gpio_pmic_wakeup = MX6DL_ARM2_EPDC_PMIC_WAKE, - .gpio_pmic_v3p3 = MX6DL_ARM2_EPDC_PWRCTRL0, - .gpio_pmic_intr = MX6DL_ARM2_EPDC_PMIC_INT, - .regulator_init = max17135_init_data, - .init = max17135_regulator_init, -}; - -static int __init max17135_regulator_init(struct max17135 *max17135) -{ - struct max17135_platform_data *pdata = &max17135_pdata; - int i, ret; - - if (!epdc_enabled) { - printk(KERN_DEBUG - "max17135_regulator_init abort: EPDC not enabled\n"); - return 0; - } - - max17135->gvee_pwrup = pdata->gvee_pwrup; - max17135->vneg_pwrup = pdata->vneg_pwrup; - max17135->vpos_pwrup = pdata->vpos_pwrup; - max17135->gvdd_pwrup = pdata->gvdd_pwrup; - max17135->gvdd_pwrdn = pdata->gvdd_pwrdn; - max17135->vpos_pwrdn = pdata->vpos_pwrdn; - max17135->vneg_pwrdn = pdata->vneg_pwrdn; - max17135->gvee_pwrdn = pdata->gvee_pwrdn; - - max17135->max_wait = pdata->vpos_pwrup + pdata->vneg_pwrup + - pdata->gvdd_pwrup + pdata->gvee_pwrup; - - max17135->gpio_pmic_pwrgood = pdata->gpio_pmic_pwrgood; - max17135->gpio_pmic_vcom_ctrl = pdata->gpio_pmic_vcom_ctrl; - max17135->gpio_pmic_wakeup = pdata->gpio_pmic_wakeup; - max17135->gpio_pmic_v3p3 = pdata->gpio_pmic_v3p3; - max17135->gpio_pmic_intr = pdata->gpio_pmic_intr; - - gpio_request(max17135->gpio_pmic_wakeup, "epdc-pmic-wake"); - gpio_direction_output(max17135->gpio_pmic_wakeup, 0); - - gpio_request(max17135->gpio_pmic_vcom_ctrl, "epdc-vcom"); - gpio_direction_output(max17135->gpio_pmic_vcom_ctrl, 0); - - gpio_request(max17135->gpio_pmic_v3p3, "epdc-v3p3"); - gpio_direction_output(max17135->gpio_pmic_v3p3, 0); - - gpio_request(max17135->gpio_pmic_intr, "epdc-pmic-int"); - gpio_direction_input(max17135->gpio_pmic_intr); - - gpio_request(max17135->gpio_pmic_pwrgood, "epdc-pwrstat"); - gpio_direction_input(max17135->gpio_pmic_pwrgood); - - max17135->vcom_setup = false; - max17135->init_done = false; - - for (i = 0; i < MAX17135_NUM_REGULATORS; i++) { - ret = max17135_register_regulator(max17135, i, - &pdata->regulator_init[i]); - if (ret != 0) { - printk(KERN_ERR"max17135 regulator init failed: %d\n", - ret); - return ret; - } - } - - regulator_has_full_constraints(); - - return 0; -} - -static int sii902x_get_pins(void) -{ - /* Sii902x HDMI controller */ - gpio_request(MX6_ARM2_DISP0_RESET, "disp0-reset"); - gpio_direction_output(MX6_ARM2_DISP0_RESET, 0); - gpio_request(MX6_ARM2_DISP0_DET_INT, "disp0-detect"); - gpio_direction_input(MX6_ARM2_DISP0_DET_INT); - return 1; -} - -static void sii902x_put_pins(void) -{ - gpio_free(MX6_ARM2_DISP0_RESET); - gpio_free(MX6_ARM2_DISP0_DET_INT); -} - -static void sii902x_hdmi_reset(void) -{ - gpio_set_value(MX6_ARM2_DISP0_RESET, 0); - msleep(10); - gpio_set_value(MX6_ARM2_DISP0_RESET, 1); - msleep(10); -} - -static struct fsl_mxc_lcd_platform_data sii902x_hdmi_data = { - .ipu_id = 0, - .disp_id = 0, - .reset = sii902x_hdmi_reset, - .get_pins = sii902x_get_pins, - .put_pins = sii902x_put_pins, -}; - -static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { - { - I2C_BOARD_INFO("cs42888", 0x48), - .platform_data = (void *)&cs42888_data, - }, { - I2C_BOARD_INFO("ov5640", 0x3c), - .platform_data = (void *)&camera_data, - }, { - I2C_BOARD_INFO("adv7180", 0x21), - .platform_data = (void *)&tvin_data, - }, -}; - -static struct imxi2c_platform_data mx6_arm2_i2c0_data = { - .bitrate = 100000, -}; - -static struct imxi2c_platform_data mx6_arm2_i2c1_data = { - .bitrate = 100000, -}; - -static struct imxi2c_platform_data mx6_arm2_i2c2_data = { - .bitrate = 400000, -}; - -static struct i2c_board_info mxc_i2c2_board_info[] __initdata = { - { - I2C_BOARD_INFO("max17135", 0x48), - .platform_data = &max17135_pdata, - }, { - I2C_BOARD_INFO("max7310", 0x1F), - .platform_data = &max7310_platdata, - }, { - I2C_BOARD_INFO("max7310", 0x1B), - .platform_data = &max7310_u48_platdata, - }, { - I2C_BOARD_INFO("mxc_dvi", 0x50), - .platform_data = &sabr_ddc_dvi_data, - .irq = gpio_to_irq(MX6_ARM2_DISP0_DET_INT), - }, { - I2C_BOARD_INFO("egalax_ts", 0x4), - .irq = gpio_to_irq(MX6_ARM2_CAP_TCH_INT), - }, { - I2C_BOARD_INFO("sii902x", 0x39), - .platform_data = &sii902x_hdmi_data, - .irq = gpio_to_irq(MX6_ARM2_DISP0_DET_INT), - }, -}; - -static struct i2c_board_info mxc_i2c1_board_info[] __initdata = { - { - I2C_BOARD_INFO("egalax_ts", 0x4), - .irq = gpio_to_irq(MX6_ARM2_CAP_TCH_INT), - }, { - I2C_BOARD_INFO("mxc_hdmi_i2c", 0x50), - }, { - I2C_BOARD_INFO("ov5640_mipi", 0x3c), - .platform_data = (void *)&ov5640_mipi_data, - }, { - I2C_BOARD_INFO("sgtl5000", 0x0a), - }, -}; - -static int epdc_get_pins(void) -{ - int ret = 0; - - /* Claim GPIOs for EPDC pins - used during power up/down */ - ret |= gpio_request(MX6DL_ARM2_EPDC_SDDO_0, "epdc_d0"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDDO_1, "epdc_d1"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDDO_2, "epdc_d2"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDDO_3, "epdc_d3"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDDO_4, "epdc_d4"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDDO_5, "epdc_d5"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDDO_6, "epdc_d6"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDDO_7, "epdc_d7"); - ret |= gpio_request(MX6DL_ARM2_EPDC_GDCLK, "epdc_gdclk"); - ret |= gpio_request(MX6DL_ARM2_EPDC_GDSP, "epdc_gdsp"); - ret |= gpio_request(MX6DL_ARM2_EPDC_GDOE, "epdc_gdoe"); - ret |= gpio_request(MX6DL_ARM2_EPDC_GDRL, "epdc_gdrl"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDCLK, "epdc_sdclk"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDOE, "epdc_sdoe"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDLE, "epdc_sdle"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDSHR, "epdc_sdshr"); - ret |= gpio_request(MX6DL_ARM2_EPDC_BDR0, "epdc_bdr0"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDCE0, "epdc_sdce0"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDCE1, "epdc_sdce1"); - ret |= gpio_request(MX6DL_ARM2_EPDC_SDCE2, "epdc_sdce2"); - - return ret; -} - -static void epdc_put_pins(void) -{ - gpio_free(MX6DL_ARM2_EPDC_SDDO_0); - gpio_free(MX6DL_ARM2_EPDC_SDDO_1); - gpio_free(MX6DL_ARM2_EPDC_SDDO_2); - gpio_free(MX6DL_ARM2_EPDC_SDDO_3); - gpio_free(MX6DL_ARM2_EPDC_SDDO_4); - gpio_free(MX6DL_ARM2_EPDC_SDDO_5); - gpio_free(MX6DL_ARM2_EPDC_SDDO_6); - gpio_free(MX6DL_ARM2_EPDC_SDDO_7); - gpio_free(MX6DL_ARM2_EPDC_GDCLK); - gpio_free(MX6DL_ARM2_EPDC_GDSP); - gpio_free(MX6DL_ARM2_EPDC_GDOE); - gpio_free(MX6DL_ARM2_EPDC_GDRL); - gpio_free(MX6DL_ARM2_EPDC_SDCLK); - gpio_free(MX6DL_ARM2_EPDC_SDOE); - gpio_free(MX6DL_ARM2_EPDC_SDLE); - gpio_free(MX6DL_ARM2_EPDC_SDSHR); - gpio_free(MX6DL_ARM2_EPDC_BDR0); - gpio_free(MX6DL_ARM2_EPDC_SDCE0); - gpio_free(MX6DL_ARM2_EPDC_SDCE1); - gpio_free(MX6DL_ARM2_EPDC_SDCE2); -} - -static iomux_v3_cfg_t mx6dl_epdc_pads_enabled[] = { - MX6DL_PAD_EIM_A16__EPDC_SDDO_0, - MX6DL_PAD_EIM_DA10__EPDC_SDDO_1, - MX6DL_PAD_EIM_DA12__EPDC_SDDO_2, - MX6DL_PAD_EIM_DA11__EPDC_SDDO_3, - MX6DL_PAD_EIM_LBA__EPDC_SDDO_4, - MX6DL_PAD_EIM_EB2__EPDC_SDDO_5, - MX6DL_PAD_EIM_CS0__EPDC_SDDO_6, - MX6DL_PAD_EIM_RW__EPDC_SDDO_7, - MX6DL_PAD_EIM_CS1__EPDC_SDDO_8, - MX6DL_PAD_EIM_DA15__EPDC_SDDO_9, - MX6DL_PAD_EIM_D16__EPDC_SDDO_10, - MX6DL_PAD_EIM_D23__EPDC_SDDO_11, - MX6DL_PAD_EIM_D19__EPDC_SDDO_12, - MX6DL_PAD_EIM_DA13__EPDC_SDDO_13, - MX6DL_PAD_EIM_DA14__EPDC_SDDO_14, - MX6DL_PAD_EIM_A25__EPDC_SDDO_15, - MX6DL_PAD_EIM_A21__EPDC_GDCLK, - MX6DL_PAD_EIM_A22__EPDC_GDSP, - MX6DL_PAD_EIM_A23__EPDC_GDOE, - MX6DL_PAD_EIM_A24__EPDC_GDRL, - MX6DL_PAD_EIM_D31__EPDC_SDCLK, - MX6DL_PAD_EIM_D27__EPDC_SDOE, - MX6DL_PAD_EIM_DA1__EPDC_SDLE, - MX6DL_PAD_EIM_EB1__EPDC_SDSHR, - MX6DL_PAD_EIM_DA2__EPDC_BDR_0, - MX6DL_PAD_EIM_DA4__EPDC_SDCE_0, - MX6DL_PAD_EIM_DA5__EPDC_SDCE_1, - MX6DL_PAD_EIM_DA6__EPDC_SDCE_2, -}; - -static iomux_v3_cfg_t mx6dl_epdc_pads_disabled[] = { - MX6DL_PAD_EIM_A16__GPIO_2_22, - MX6DL_PAD_EIM_DA10__GPIO_3_10, - MX6DL_PAD_EIM_DA12__GPIO_3_12, - MX6DL_PAD_EIM_DA11__GPIO_3_11, - MX6DL_PAD_EIM_LBA__GPIO_2_27, - MX6DL_PAD_EIM_EB2__GPIO_2_30, - MX6DL_PAD_EIM_CS0__GPIO_2_23, - MX6DL_PAD_EIM_RW__GPIO_2_26, - MX6DL_PAD_EIM_CS1__GPIO_2_24, - MX6DL_PAD_EIM_DA15__GPIO_3_15, - MX6DL_PAD_EIM_D16__GPIO_3_16, - MX6DL_PAD_EIM_D23__GPIO_3_23, - MX6DL_PAD_EIM_D19__GPIO_3_19, - MX6DL_PAD_EIM_DA13__GPIO_3_13, - MX6DL_PAD_EIM_DA14__GPIO_3_14, - MX6DL_PAD_EIM_A25__GPIO_5_2, - MX6DL_PAD_EIM_A21__GPIO_2_17, - MX6DL_PAD_EIM_A22__GPIO_2_16, - MX6DL_PAD_EIM_A23__GPIO_6_6, - MX6DL_PAD_EIM_A24__GPIO_5_4, - MX6DL_PAD_EIM_D31__GPIO_3_31, - MX6DL_PAD_EIM_D27__GPIO_3_27, - MX6DL_PAD_EIM_DA1__GPIO_3_1, - MX6DL_PAD_EIM_EB1__GPIO_2_29, - MX6DL_PAD_EIM_DA2__GPIO_3_2, - MX6DL_PAD_EIM_DA4__GPIO_3_4, - MX6DL_PAD_EIM_DA5__GPIO_3_5, - MX6DL_PAD_EIM_DA6__GPIO_3_6, -}; -static void epdc_enable_pins(void) -{ - /* Configure MUX settings to enable EPDC use */ - mxc_iomux_v3_setup_multiple_pads(mx6dl_epdc_pads_enabled, \ - ARRAY_SIZE(mx6dl_epdc_pads_enabled)); - - gpio_direction_input(MX6DL_ARM2_EPDC_SDDO_0); - gpio_direction_input(MX6DL_ARM2_EPDC_SDDO_1); - gpio_direction_input(MX6DL_ARM2_EPDC_SDDO_2); - gpio_direction_input(MX6DL_ARM2_EPDC_SDDO_3); - gpio_direction_input(MX6DL_ARM2_EPDC_SDDO_4); - gpio_direction_input(MX6DL_ARM2_EPDC_SDDO_5); - gpio_direction_input(MX6DL_ARM2_EPDC_SDDO_6); - gpio_direction_input(MX6DL_ARM2_EPDC_SDDO_7); - gpio_direction_input(MX6DL_ARM2_EPDC_GDCLK); - gpio_direction_input(MX6DL_ARM2_EPDC_GDSP); - gpio_direction_input(MX6DL_ARM2_EPDC_GDOE); - gpio_direction_input(MX6DL_ARM2_EPDC_GDRL); - gpio_direction_input(MX6DL_ARM2_EPDC_SDCLK); - gpio_direction_input(MX6DL_ARM2_EPDC_SDOE); - gpio_direction_input(MX6DL_ARM2_EPDC_SDLE); - gpio_direction_input(MX6DL_ARM2_EPDC_SDSHR); - gpio_direction_input(MX6DL_ARM2_EPDC_BDR0); - gpio_direction_input(MX6DL_ARM2_EPDC_SDCE0); - gpio_direction_input(MX6DL_ARM2_EPDC_SDCE1); - gpio_direction_input(MX6DL_ARM2_EPDC_SDCE2); -} - -static void epdc_disable_pins(void) -{ - /* Configure MUX settings for EPDC pins to - * GPIO and drive to 0. */ - mxc_iomux_v3_setup_multiple_pads(mx6dl_epdc_pads_disabled, \ - ARRAY_SIZE(mx6dl_epdc_pads_disabled)); - - gpio_direction_output(MX6DL_ARM2_EPDC_SDDO_0, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDDO_1, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDDO_2, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDDO_3, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDDO_4, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDDO_5, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDDO_6, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDDO_7, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_GDCLK, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_GDSP, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_GDOE, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_GDRL, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDCLK, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDOE, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDLE, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDSHR, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_BDR0, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDCE0, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDCE1, 0); - gpio_direction_output(MX6DL_ARM2_EPDC_SDCE2, 0); -} - -static struct fb_videomode e60_v110_mode = { - .name = "E60_V110", - .refresh = 50, - .xres = 800, - .yres = 600, - .pixclock = 18604700, - .left_margin = 8, - .right_margin = 178, - .upper_margin = 4, - .lower_margin = 10, - .hsync_len = 20, - .vsync_len = 4, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - .flag = 0, -}; -static struct fb_videomode e60_v220_mode = { - .name = "E60_V220", - .refresh = 85, - .xres = 800, - .yres = 600, - .pixclock = 30000000, - .left_margin = 8, - .right_margin = 164, - .upper_margin = 4, - .lower_margin = 8, - .hsync_len = 4, - .vsync_len = 1, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - .flag = 0, - .refresh = 85, - .xres = 800, - .yres = 600, -}; -static struct fb_videomode e060scm_mode = { - .name = "E060SCM", - .refresh = 85, - .xres = 800, - .yres = 600, - .pixclock = 26666667, - .left_margin = 8, - .right_margin = 100, - .upper_margin = 4, - .lower_margin = 8, - .hsync_len = 4, - .vsync_len = 1, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - .flag = 0, -}; -static struct fb_videomode e97_v110_mode = { - .name = "E97_V110", - .refresh = 50, - .xres = 1200, - .yres = 825, - .pixclock = 32000000, - .left_margin = 12, - .right_margin = 128, - .upper_margin = 4, - .lower_margin = 10, - .hsync_len = 20, - .vsync_len = 4, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - .flag = 0, -}; - -static struct imx_epdc_fb_mode panel_modes[] = { - { - &e60_v110_mode, - 4, /* vscan_holdoff */ - 10, /* sdoed_width */ - 20, /* sdoed_delay */ - 10, /* sdoez_width */ - 20, /* sdoez_delay */ - 428, /* gdclk_hp_offs */ - 20, /* gdsp_offs */ - 0, /* gdoe_offs */ - 1, /* gdclk_offs */ - 1, /* num_ce */ - }, - { - &e60_v220_mode, - 4, /* vscan_holdoff */ - 10, /* sdoed_width */ - 20, /* sdoed_delay */ - 10, /* sdoez_width */ - 20, /* sdoez_delay */ - 465, /* gdclk_hp_offs */ - 20, /* gdsp_offs */ - 0, /* gdoe_offs */ - 9, /* gdclk_offs */ - 1, /* num_ce */ - }, - { - &e060scm_mode, - 4, /* vscan_holdoff */ - 10, /* sdoed_width */ - 20, /* sdoed_delay */ - 10, /* sdoez_width */ - 20, /* sdoez_delay */ - 419, /* gdclk_hp_offs */ - 20, /* gdsp_offs */ - 0, /* gdoe_offs */ - 5, /* gdclk_offs */ - 1, /* num_ce */ - }, - { - &e97_v110_mode, - 8, /* vscan_holdoff */ - 10, /* sdoed_width */ - 20, /* sdoed_delay */ - 10, /* sdoez_width */ - 20, /* sdoez_delay */ - 632, /* gdclk_hp_offs */ - 20, /* gdsp_offs */ - 0, /* gdoe_offs */ - 1, /* gdclk_offs */ - 3, /* num_ce */ - } -}; - -static struct imx_epdc_fb_platform_data epdc_data = { - .epdc_mode = panel_modes, - .num_modes = ARRAY_SIZE(panel_modes), - .get_pins = epdc_get_pins, - .put_pins = epdc_put_pins, - .enable_pins = epdc_enable_pins, - .disable_pins = epdc_disable_pins, -}; - -static void imx6_arm2_usbotg_vbus(bool on) -{ - if (on) - gpio_set_value(MX6_ARM2_USB_OTG_PWR, 1); - else - gpio_set_value(MX6_ARM2_USB_OTG_PWR, 0); -} - -static void __init twr_vf600_init_usb(void) -{ - int ret = 0; - - imx_otg_base = MX6_IO_ADDRESS(MX6Q_USB_OTG_BASE_ADDR); - - /* disable external charger detect, - * or it will affect signal quality at dp. - */ - - ret = gpio_request(MX6_ARM2_USB_OTG_PWR, "usb-pwr"); - if (ret) { - pr_err("failed to get GPIO MX6_ARM2_USB_OTG_PWR:%d\n", ret); - return; - } - gpio_direction_output(MX6_ARM2_USB_OTG_PWR, 0); - mxc_iomux_set_gpr_register(1, 13, 1, 1); - - mx6_set_otghost_vbus_func(imx6_arm2_usbotg_vbus); - mx6_usb_dr_init(); - mx6_usb_h1_init(); -#ifdef CONFIG_USB_EHCI_ARC_HSIC - mx6_usb_h2_init(); - mx6_usb_h3_init(); -#endif -} - -static struct viv_gpu_platform_data imx6_gpu_pdata __initdata = { - .reserved_mem_size = SZ_128M, -}; - -/* HW Initialization, if return 0, initialization is successful. */ -static int mx6_arm2_sata_init(struct device *dev, void __iomem *addr) -{ - u32 tmpdata; - int ret = 0; - struct clk *clk; - - /* Enable SATA PWR CTRL_0 of MAX7310 */ - gpio_request(MX6_ARM2_MAX7310_1_BASE_ADDR, "SATA_PWR_EN"); - gpio_direction_output(MX6_ARM2_MAX7310_1_BASE_ADDR, 1); - - sata_clk = clk_get(dev, "imx_sata_clk"); - if (IS_ERR(sata_clk)) { - dev_err(dev, "no sata clock.\n"); - return PTR_ERR(sata_clk); - } - ret = clk_enable(sata_clk); - if (ret) { - dev_err(dev, "can't enable sata clock.\n"); - goto put_sata_clk; - } - - /* Set PHY Paremeters, two steps to configure the GPR13, - * one write for rest of parameters, mask of first write is 0x07FFFFFD, - * and the other one write for setting the mpll_clk_off_b - *.rx_eq_val_0(iomuxc_gpr13[26:24]), - *.los_lvl(iomuxc_gpr13[23:19]), - *.rx_dpll_mode_0(iomuxc_gpr13[18:16]), - *.sata_speed(iomuxc_gpr13[15]), - *.mpll_ss_en(iomuxc_gpr13[14]), - *.tx_atten_0(iomuxc_gpr13[13:11]), - *.tx_boost_0(iomuxc_gpr13[10:7]), - *.tx_lvl(iomuxc_gpr13[6:2]), - *.mpll_ck_off(iomuxc_gpr13[1]), - *.tx_edgerate_0(iomuxc_gpr13[0]), - */ - tmpdata = readl(IOMUXC_GPR13); - writel(((tmpdata & ~0x07FFFFFD) | 0x0593A044), IOMUXC_GPR13); - - /* enable SATA_PHY PLL */ - tmpdata = readl(IOMUXC_GPR13); - writel(((tmpdata & ~0x2) | 0x2), IOMUXC_GPR13); - - /* Get the AHB clock rate, and configure the TIMER1MS reg later */ - clk = clk_get(NULL, "ahb"); - if (IS_ERR(clk)) { - dev_err(dev, "no ahb clock.\n"); - ret = PTR_ERR(clk); - goto release_sata_clk; - } - tmpdata = clk_get_rate(clk) / 1000; - clk_put(clk); - - ret = sata_init(addr, tmpdata); - if (ret == 0) - return ret; - -release_sata_clk: - clk_disable(sata_clk); -put_sata_clk: - clk_put(sata_clk); - /* Disable SATA PWR CTRL_0 of MAX7310 */ - gpio_request(MX6_ARM2_MAX7310_1_BASE_ADDR, "SATA_PWR_EN"); - gpio_direction_output(MX6_ARM2_MAX7310_1_BASE_ADDR, 0); - - return ret; -} - -static void mx6_arm2_sata_exit(struct device *dev) -{ - clk_disable(sata_clk); - clk_put(sata_clk); - - /* Disable SATA PWR CTRL_0 of MAX7310 */ - gpio_request(MX6_ARM2_MAX7310_1_BASE_ADDR, "SATA_PWR_EN"); - gpio_direction_output(MX6_ARM2_MAX7310_1_BASE_ADDR, 0); - -} - -static struct ahci_platform_data mx6_arm2_sata_data = { - .init = mx6_arm2_sata_init, - .exit = mx6_arm2_sata_exit, -}; - -static struct imx_asrc_platform_data imx_asrc_data = { - .channel_bits = 4, - .clk_map_ver = 2, -}; - -static void mx6_arm2_reset_mipi_dsi(void) -{ - gpio_set_value(MX6_ARM2_DISP0_PWR, 1); - gpio_set_value(MX6_ARM2_DISP0_RESET, 1); - udelay(10); - gpio_set_value(MX6_ARM2_DISP0_RESET, 0); - udelay(50); - gpio_set_value(MX6_ARM2_DISP0_RESET, 1); - - /* - * it needs to delay 120ms minimum for reset complete - */ - msleep(120); -} - -static struct mipi_dsi_platform_data mipi_dsi_pdata = { - .ipu_id = 1, - .disp_id = 1, - .lcd_panel = "TRULY-WVGA", - .reset = mx6_arm2_reset_mipi_dsi, -}; - -static struct ipuv3_fb_platform_data sabr_fb_data[] = { - { /*fb0*/ - .disp_dev = "ldb", - .interface_pix_fmt = IPU_PIX_FMT_RGB666, - .mode_str = "LDB-XGA", - .default_bpp = 16, - .int_clk = false, - }, { - .disp_dev = "mipi_dsi", - .interface_pix_fmt = IPU_PIX_FMT_RGB24, - .mode_str = "TRULY-WVGA", - .default_bpp = 24, - .int_clk = false, - }, { - .disp_dev = "ldb", - .interface_pix_fmt = IPU_PIX_FMT_RGB666, - .mode_str = "LDB-XGA", - .default_bpp = 16, - .int_clk = false, - }, { - .disp_dev = "lcd", - .interface_pix_fmt = IPU_PIX_FMT_RGB565, - .mode_str = "CLAA-WVGA", - .default_bpp = 16, - .int_clk = false, - } -}; - -static void hdmi_init(int ipu_id, int disp_id) -{ - int hdmi_mux_setting; - int max_ipu_id = cpu_is_mx6q() ? 1 : 0; - - if ((ipu_id > max_ipu_id) || (ipu_id < 0)) { - pr_err("Invalid IPU select for HDMI: %d. Set to 0\n", ipu_id); - ipu_id = 0; - } - - if ((disp_id > 1) || (disp_id < 0)) { - pr_err("Invalid DI select for HDMI: %d. Set to 0\n", disp_id); - disp_id = 0; - } - - /* Configure the connection between IPU1/2 and HDMI */ - hdmi_mux_setting = 2 * ipu_id + disp_id; - - /* GPR3, bits 2-3 = HDMI_MUX_CTL */ - mxc_iomux_set_gpr_register(3, 2, 2, hdmi_mux_setting); -} - -static struct fsl_mxc_hdmi_platform_data hdmi_data = { - .init = hdmi_init, -}; - -static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = { - .ipu_id = 0, - .disp_id = 0, -}; - -static struct fsl_mxc_lcd_platform_data lcdif_data = { - .ipu_id = 0, - .disp_id = 0, - .default_ifmt = IPU_PIX_FMT_RGB565, -}; - -static struct fsl_mxc_ldb_platform_data ldb_data = { - .ipu_id = 1, - .disp_id = 0, - .ext_ref = 1, - .mode = LDB_SEP0, - .sec_ipu_id = 0, - .sec_disp_id = 1, -}; - -static struct imx_ipuv3_platform_data ipu_data[] = { - { - .rev = 4, - .csi_clk[0] = "clko_clk", - }, { - .rev = 4, - .csi_clk[0] = "clko_clk", - }, -}; - -static struct platform_pwm_backlight_data mx6_arm2_pwm_backlight_data = { - .pwm_id = 0, - .max_brightness = 255, - .dft_brightness = 128, - .pwm_period_ns = 50000, -}; - -static struct gpio mx6_flexcan_gpios[] = { - { MX6_ARM2_CAN1_EN, GPIOF_OUT_INIT_LOW, "flexcan1-en" }, - { MX6_ARM2_CAN1_STBY, GPIOF_OUT_INIT_LOW, "flexcan1-stby" }, - { MX6_ARM2_CAN2_EN, GPIOF_OUT_INIT_LOW, "flexcan2-en" }, -}; - -static void mx6_flexcan0_switch(int enable) -{ - if (enable) { - gpio_set_value(MX6_ARM2_CAN1_EN, 1); - gpio_set_value(MX6_ARM2_CAN1_STBY, 1); - } else { - gpio_set_value(MX6_ARM2_CAN1_EN, 0); - gpio_set_value(MX6_ARM2_CAN1_STBY, 0); - } -} - -static void mx6_flexcan1_switch(int enable) -{ - if (enable) { - gpio_set_value(MX6_ARM2_CAN2_EN, 1); - gpio_set_value_cansleep(MX6_ARM2_CAN2_STBY, 1); - } else { - gpio_set_value(MX6_ARM2_CAN2_EN, 0); - gpio_set_value_cansleep(MX6_ARM2_CAN2_STBY, 0); - } -} - -static const struct flexcan_platform_data - mx6_arm2_flexcan_pdata[] __initconst = { - { - .transceiver_switch = mx6_flexcan0_switch, - }, { - .transceiver_switch = mx6_flexcan1_switch, - } -}; - -static struct mipi_csi2_platform_data mipi_csi2_pdata = { - .ipu_id = 0, - .csi_id = 0, - .v_channel = 0, - .lanes = 2, - .dphy_clk = "mipi_pllref_clk", - .pixel_clk = "emi_clk", -}; - -static void arm2_suspend_enter(void) +static void twr_vf600_suspend_enter(void) { /* suspend preparation */ } -static void arm2_suspend_exit(void) +static void twr_vf600_suspend_exit(void) { /* resmue resore */ } -static const struct pm_platform_data mx6_arm2_pm_data __initconst = { +static const struct pm_platform_data twr_vf600_pm_data __initconst = { .name = "imx_pm", - .suspend_enter = arm2_suspend_enter, - .suspend_exit = arm2_suspend_exit, -}; - -static struct mxc_audio_platform_data sab_audio_data = { - .sysclk = 16934400, -}; - -static struct platform_device sab_audio_device = { - .name = "imx-cs42888", -}; - -static struct imx_esai_platform_data sab_esai_pdata = { - .flags = IMX_ESAI_NET, -}; - -static struct regulator_consumer_supply arm2_vmmc_consumers[] = { - REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"), - REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.2"), - REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.3"), -}; - -static struct regulator_init_data arm2_vmmc_init = { - .num_consumer_supplies = ARRAY_SIZE(arm2_vmmc_consumers), - .consumer_supplies = arm2_vmmc_consumers, -}; - -static struct fixed_voltage_config arm2_vmmc_reg_config = { - .supply_name = "vmmc", - .microvolts = 3300000, - .gpio = -1, - .init_data = &arm2_vmmc_init, -}; - -static struct platform_device arm2_vmmc_reg_devices = { - .name = "reg-fixed-voltage", - .id = 0, - .dev = { - .platform_data = &arm2_vmmc_reg_config, - }, -}; - -#ifdef CONFIG_SND_SOC_CS42888 - -static struct regulator_consumer_supply cs42888_arm2_consumer_va = { - .supply = "VA", - .dev_name = "0-0048", -}; - -static struct regulator_consumer_supply cs42888_arm2_consumer_vd = { - .supply = "VD", - .dev_name = "0-0048", -}; - -static struct regulator_consumer_supply cs42888_arm2_consumer_vls = { - .supply = "VLS", - .dev_name = "0-0048", -}; - -static struct regulator_consumer_supply cs42888_arm2_consumer_vlc = { - .supply = "VLC", - .dev_name = "0-0048", -}; - -static struct regulator_init_data cs42888_arm2_va_reg_initdata = { - .num_consumer_supplies = 1, - .consumer_supplies = &cs42888_arm2_consumer_va, -}; - -static struct regulator_init_data cs42888_arm2_vd_reg_initdata = { - .num_consumer_supplies = 1, - .consumer_supplies = &cs42888_arm2_consumer_vd, -}; - -static struct regulator_init_data cs42888_arm2_vls_reg_initdata = { - .num_consumer_supplies = 1, - .consumer_supplies = &cs42888_arm2_consumer_vls, -}; - -static struct regulator_init_data cs42888_arm2_vlc_reg_initdata = { - .num_consumer_supplies = 1, - .consumer_supplies = &cs42888_arm2_consumer_vlc, -}; - -static struct fixed_voltage_config cs42888_arm2_va_reg_config = { - .supply_name = "VA", - .microvolts = 2800000, - .gpio = -1, - .init_data = &cs42888_arm2_va_reg_initdata, -}; - -static struct fixed_voltage_config cs42888_arm2_vd_reg_config = { - .supply_name = "VD", - .microvolts = 2800000, - .gpio = -1, - .init_data = &cs42888_arm2_vd_reg_initdata, -}; - -static struct fixed_voltage_config cs42888_arm2_vls_reg_config = { - .supply_name = "VLS", - .microvolts = 2800000, - .gpio = -1, - .init_data = &cs42888_arm2_vls_reg_initdata, -}; - -static struct fixed_voltage_config cs42888_arm2_vlc_reg_config = { - .supply_name = "VLC", - .microvolts = 2800000, - .gpio = -1, - .init_data = &cs42888_arm2_vlc_reg_initdata, -}; - -static struct platform_device cs42888_arm2_va_reg_devices = { - .name = "reg-fixed-voltage", - .id = 3, - .dev = { - .platform_data = &cs42888_arm2_va_reg_config, - }, -}; - -static struct platform_device cs42888_arm2_vd_reg_devices = { - .name = "reg-fixed-voltage", - .id = 4, - .dev = { - .platform_data = &cs42888_arm2_vd_reg_config, - }, -}; - -static struct platform_device cs42888_arm2_vls_reg_devices = { - .name = "reg-fixed-voltage", - .id = 5, - .dev = { - .platform_data = &cs42888_arm2_vls_reg_config, - }, -}; - -static struct platform_device cs42888_arm2_vlc_reg_devices = { - .name = "reg-fixed-voltage", - .id = 6, - .dev = { - .platform_data = &cs42888_arm2_vlc_reg_config, - }, -}; - -#endif /* CONFIG_SND_SOC_CS42888 */ - -#ifdef CONFIG_SND_SOC_SGTL5000 - -static struct regulator_consumer_supply sgtl5000_arm2_consumer_vdda = { - .supply = "VDDA", - .dev_name = "1-000a", -}; - -static struct regulator_consumer_supply sgtl5000_arm2_consumer_vddio = { - .supply = "VDDIO", - .dev_name = "1-000a", -}; - -static struct regulator_consumer_supply sgtl5000_arm2_consumer_vddd = { - .supply = "VDDD", - .dev_name = "1-000a", -}; - -static struct regulator_init_data sgtl5000_arm2_vdda_reg_initdata = { - .num_consumer_supplies = 1, - .consumer_supplies = &sgtl5000_arm2_consumer_vdda, -}; - -static struct regulator_init_data sgtl5000_arm2_vddio_reg_initdata = { - .num_consumer_supplies = 1, - .consumer_supplies = &sgtl5000_arm2_consumer_vddio, -}; - -static struct regulator_init_data sgtl5000_arm2_vddd_reg_initdata = { - .num_consumer_supplies = 1, - .consumer_supplies = &sgtl5000_arm2_consumer_vddd, -}; - -static struct fixed_voltage_config sgtl5000_arm2_vdda_reg_config = { - .supply_name = "VDDA", - .microvolts = 1800000, - .gpio = -1, - .init_data = &sgtl5000_arm2_vdda_reg_initdata, -}; - -static struct fixed_voltage_config sgtl5000_arm2_vddio_reg_config = { - .supply_name = "VDDIO", - .microvolts = 3300000, - .gpio = -1, - .init_data = &sgtl5000_arm2_vddio_reg_initdata, -}; - -static struct fixed_voltage_config sgtl5000_arm2_vddd_reg_config = { - .supply_name = "VDDD", - .microvolts = 0, - .gpio = -1, - .init_data = &sgtl5000_arm2_vddd_reg_initdata, -}; - -static struct platform_device sgtl5000_arm2_vdda_reg_devices = { - .name = "reg-fixed-voltage", - .id = 7, - .dev = { - .platform_data = &sgtl5000_arm2_vdda_reg_config, - }, -}; - -static struct platform_device sgtl5000_arm2_vddio_reg_devices = { - .name = "reg-fixed-voltage", - .id = 8, - .dev = { - .platform_data = &sgtl5000_arm2_vddio_reg_config, - }, -}; - -static struct platform_device sgtl5000_arm2_vddd_reg_devices = { - .name = "reg-fixed-voltage", - .id = 9, - .dev = { - .platform_data = &sgtl5000_arm2_vddd_reg_config, - }, -}; - -#endif /* CONFIG_SND_SOC_SGTL5000 */ - -static struct mxc_audio_platform_data mx6_arm2_audio_data; - -static int mx6_arm2_sgtl5000_init(void) -{ - - mx6_arm2_audio_data.sysclk = 12000000; - - return 0; -} - -static struct imx_ssi_platform_data mx6_arm2_ssi_pdata = { - .flags = IMX_SSI_DMA | IMX_SSI_SYN, -}; - -static struct mxc_audio_platform_data mx6_arm2_audio_data = { - .ssi_num = 1, - .src_port = 2, - .ext_port = 3, - .init = mx6_arm2_sgtl5000_init, - .hp_gpio = -1, -}; - -static struct platform_device mx6_arm2_audio_device = { - .name = "imx-sgtl5000", -}; - -static int __init twr_vf600_init_audio(void) -{ - struct clk *pll3_pfd, *esai_clk; - mxc_register_device(&sab_audio_device, &sab_audio_data); - imx6q_add_imx_esai(0, &sab_esai_pdata); - - esai_clk = clk_get(NULL, "esai_clk"); - if (IS_ERR(esai_clk)) - return PTR_ERR(esai_clk); - - pll3_pfd = clk_get(NULL, "pll3_pfd_508M"); - if (IS_ERR(pll3_pfd)) - return PTR_ERR(pll3_pfd); - - clk_set_parent(esai_clk, pll3_pfd); - clk_set_rate(esai_clk, 101647058); - -#ifdef CONFIG_SND_SOC_CS42888 - platform_device_register(&cs42888_arm2_va_reg_devices); - platform_device_register(&cs42888_arm2_vd_reg_devices); - platform_device_register(&cs42888_arm2_vls_reg_devices); - platform_device_register(&cs42888_arm2_vlc_reg_devices); -#endif - - if (sgtl5000_en) { - /* SSI audio init part */ - mxc_register_device(&mx6_arm2_audio_device, - &mx6_arm2_audio_data); - imx6q_add_imx_ssi(1, &mx6_arm2_ssi_pdata); - - /* - * AUDMUX3 and CSI0_Camera use the same pin - * MX6x_PAD_CSI0_DAT5 - */ - if (cpu_is_mx6q()) { - mxc_iomux_v3_setup_multiple_pads(mx6q_arm2_audmux_pads, - ARRAY_SIZE(mx6q_arm2_audmux_pads)); - } else if (cpu_is_mx6dl()) { - mxc_iomux_v3_setup_multiple_pads(mx6dl_arm2_audmux_pads, - ARRAY_SIZE(mx6dl_arm2_audmux_pads)); - } - -#ifdef CONFIG_SND_SOC_SGTL5000 - platform_device_register(&sgtl5000_arm2_vdda_reg_devices); - platform_device_register(&sgtl5000_arm2_vddio_reg_devices); - platform_device_register(&sgtl5000_arm2_vddd_reg_devices); -#endif - } - - return 0; -} - -static int __init early_use_esai_record(char *p) -{ - esai_record = 1; - return 0; -} - -early_param("esai_record", early_use_esai_record); - -static struct mxc_mlb_platform_data mx6_arm2_mlb150_data = { - .reg_nvcc = NULL, - .mlb_clk = "mlb150_clk", - .mlb_pll_clk = "pll6", + .suspend_enter = twr_vf600_suspend_enter, + .suspend_exit = twr_vf600_suspend_exit, }; static struct mxc_dvfs_platform_data arm2_dvfscore_data = { @@ -1871,71 +269,7 @@ static void __init twr_vf600_fixup(struct machine_desc *desc, struct tag *tags, { } -#if 0 //FIXME -static int __init early_enable_sgtl5000(char *p) -{ - sgtl5000_en = 1; - return 0; -} - -early_param("sgtl5000", early_enable_sgtl5000); - -static int __init early_enable_spdif(char *p) -{ - spdif_en = 1; - return 0; -} - -early_param("spdif", early_enable_spdif); - -static int __init early_enable_can(char *p) -{ - flexcan_en = 1; - return 0; -} - -early_param("flexcan", early_enable_can); - -static int spdif_clk_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long rate_actual; - rate_actual = clk_round_rate(clk, rate); - clk_set_rate(clk, rate_actual); - return 0; -} - -static struct mxc_spdif_platform_data mxc_spdif_data = { - .spdif_tx = 1, /* enable tx */ - .spdif_rx = 1, /* enable rx */ - /* - * spdif0_clk will be 454.7MHz divided by ccm dividers. - * - * 44.1KHz: 454.7MHz / 7 (ccm) / 23 (spdif) = 44,128 Hz ~ 0.06% error - * 48KHz: 454.7MHz / 4 (ccm) / 37 (spdif) = 48,004 Hz ~ 0.01% error - * 32KHz: 454.7MHz / 6 (ccm) / 37 (spdif) = 32,003 Hz ~ 0.01% error - */ - .spdif_clk_44100 = 1, /* tx clk from spdif0_clk_root */ - .spdif_clk_48000 = 1, /* tx clk from spdif0_clk_root */ - .spdif_div_44100 = 23, - .spdif_div_48000 = 37, - .spdif_div_32000 = 37, - .spdif_rx_clk = 0, /* rx clk from spdif stream */ - .spdif_clk_set_rate = spdif_clk_set_rate, - .spdif_clk = NULL, /* spdif bus clk */ -}; - -static int __init early_disable_mipi_dsi(char *p) -{ - /*enable on board HDMI*/ - /*mulplex pin with mipi disp0_reset we should disable mipi reset*/ - disable_mipi_dsi = 1; - return 0; -} - -early_param("disable_mipi_dsi", early_disable_mipi_dsi); -#endif //FIXME - -/*! +/* * Board specific initialization. */ static void __init twr_vf600_init(void) @@ -1943,59 +277,19 @@ static void __init twr_vf600_init(void) #if 0 //FIXME int i; int ret; - - iomux_v3_cfg_t *common_pads = NULL; - iomux_v3_cfg_t *esai_rec_pads = NULL; - iomux_v3_cfg_t *spdif_pads = NULL; - iomux_v3_cfg_t *flexcan_pads = NULL; - iomux_v3_cfg_t *i2c3_pads = NULL; - + iomux_vmf_cfg_t *common_pads = NULL; int common_pads_cnt; - int esai_rec_pads_cnt; - int spdif_pads_cnt; - int flexcan_pads_cnt; - int i2c3_pads_cnt; - /* * common pads: pads are non-shared with others on this board * feature_pds: pads are shared with others on this board */ - if (cpu_is_mx6q()) { - common_pads = mx6q_arm2_pads; - esai_rec_pads = mx6q_arm2_esai_record_pads; - spdif_pads = mx6q_arm2_spdif_pads; - flexcan_pads = mx6q_arm2_can_pads; - i2c3_pads = mx6q_arm2_i2c3_pads; - - common_pads_cnt = ARRAY_SIZE(mx6q_arm2_pads); - esai_rec_pads_cnt = ARRAY_SIZE(mx6q_arm2_esai_record_pads); - spdif_pads_cnt = ARRAY_SIZE(mx6q_arm2_spdif_pads); - flexcan_pads_cnt = ARRAY_SIZE(mx6q_arm2_can_pads); - i2c3_pads_cnt = ARRAY_SIZE(mx6q_arm2_i2c3_pads); - } else if (cpu_is_mx6dl()) { - common_pads = mx6dl_arm2_pads; - esai_rec_pads = mx6dl_arm2_esai_record_pads; - spdif_pads = mx6dl_arm2_spdif_pads; - flexcan_pads = mx6dl_arm2_can_pads; - i2c3_pads = mx6dl_arm2_i2c3_pads; - - common_pads_cnt = ARRAY_SIZE(mx6dl_arm2_pads); - esai_rec_pads_cnt = ARRAY_SIZE(mx6dl_arm2_esai_record_pads); - spdif_pads_cnt = ARRAY_SIZE(mx6dl_arm2_spdif_pads); - flexcan_pads_cnt = ARRAY_SIZE(mx6dl_arm2_can_pads); - i2c3_pads_cnt = ARRAY_SIZE(mx6dl_arm2_i2c3_pads); - } + common_pads = mx6q_arm2_pads; + common_pads_cnt = ARRAY_SIZE(mx6q_arm2_pads); BUG_ON(!common_pads); - mxc_iomux_v3_setup_multiple_pads(common_pads, common_pads_cnt); - - if (esai_record) { - BUG_ON(!esai_rec_pads); - mxc_iomux_v3_setup_multiple_pads(esai_rec_pads, - esai_rec_pads_cnt); - } + mxc_iomux_vmvf_setup_multiple_pads(common_pads, common_pads_cnt); /* * IEEE-1588 ts_clk, S/PDIF in and i2c3 are mutually exclusive @@ -2003,28 +297,12 @@ static void __init twr_vf600_init(void) * S/PDIF out and can1 stby are mutually exclusive because both * use GPIO_17. */ -#ifndef CONFIG_FEC_1588 - if (spdif_en) { - BUG_ON(!spdif_pads); - mxc_iomux_v3_setup_multiple_pads(spdif_pads, spdif_pads_cnt); - } else { - BUG_ON(!i2c3_pads); - mxc_iomux_v3_setup_multiple_pads(i2c3_pads, i2c3_pads_cnt); - } -#else /* Set GPIO_16 input for IEEE-1588 ts_clk and RMII reference clock * For MX6 GPR1 bit21 meaning: * Bit21: 0 - GPIO_16 pad output * 1 - GPIO_16 pad input */ mxc_iomux_set_gpr_register(1, 21, 1, 1); -#endif - - if (!spdif_en && flexcan_en) { - BUG_ON(!flexcan_pads); - mxc_iomux_v3_setup_multiple_pads(flexcan_pads, - flexcan_pads_cnt); - } /* * the following is the common devices support on the shared ARM2 boards @@ -2034,67 +312,14 @@ static void __init twr_vf600_init(void) * on each indivual SOC, we can use cpu_is_mx6q/6dl() to diff it. */ - gp_reg_id = arm2_dvfscore_data.reg_id; twr_vf600_init_uart(); - imx6q_add_mipi_csi2(&mipi_csi2_pdata); - imx6q_add_mxc_hdmi_core(&hdmi_core_data); - - imx6q_add_ipuv3(0, &ipu_data[0]); - if (cpu_is_mx6q()) - imx6q_add_ipuv3(1, &ipu_data[1]); - - if (cpu_is_mx6dl()) { - mipi_dsi_pdata.ipu_id = 0; - mipi_dsi_pdata.disp_id = 1; - ldb_data.ipu_id = 0; - ldb_data.disp_id = 0; - for (i = 0; i < ARRAY_SIZE(sabr_fb_data) / 2; i++) - imx6q_add_ipuv3fb(i, &sabr_fb_data[i]); - } else { - for (i = 0; i < ARRAY_SIZE(sabr_fb_data); i++) - imx6q_add_ipuv3fb(i, &sabr_fb_data[i]); - } - - if (!disable_mipi_dsi) - imx6q_add_mipi_dsi(&mipi_dsi_pdata); - imx6q_add_lcdif(&lcdif_data); - imx6q_add_ldb(&ldb_data); - imx6q_add_v4l2_output(0); - imx6q_add_v4l2_capture(0); - - imx6q_add_imx_snvs_rtc(); - - imx6q_add_imx_i2c(0, &mx6_arm2_i2c0_data); - imx6q_add_imx_i2c(1, &mx6_arm2_i2c1_data); - i2c_register_board_info(0, mxc_i2c0_board_info, - ARRAY_SIZE(mxc_i2c0_board_info)); - i2c_register_board_info(1, mxc_i2c1_board_info, - ARRAY_SIZE(mxc_i2c1_board_info)); - if (!spdif_en) { - if (disable_mipi_dsi) - mx6_arm2_i2c2_data.bitrate = 100000; - imx6q_add_imx_i2c(2, &mx6_arm2_i2c2_data); - i2c_register_board_info(2, mxc_i2c2_board_info, - ARRAY_SIZE(mxc_i2c2_board_info)); - } - - /* SPI */ - imx6q_add_ecspi(0, &mx6_arm2_spi_data); - spi_device_init(); - - imx6q_add_mxc_hdmi(&hdmi_data); - - imx6q_add_anatop_thermal_imx(1, &mx6_arm2_anatop_thermal_data); + mvf_add_imx_snvs_rtc(); + mvf_init_fec(fec_data); - if (!esai_record) - imx6_init_fec(fec_data); - - imx6q_add_pm_imx(0, &mx6_arm2_pm_data); + imx6q_add_pm_imx(0, &twr_vf600_pm_data); imx6q_add_sdhci_usdhc_imx(3, &mx6_arm2_sd4_data); imx6q_add_sdhci_usdhc_imx(2, &mx6_arm2_sd3_data); imx_add_viv_gpu(&imx6_gpu_data, &imx6_gpu_pdata); - if (cpu_is_mx6q()) - imx6q_add_ahci(0, &mx6_arm2_sata_data); imx6q_add_vpu(); twr_vf600_init_usb(); twr_vf600_init_audio(); @@ -2175,9 +400,13 @@ static void __init mvf_timer_init(void) #endif mvf_clocks_init(128000, 24000000, 32000, 24000000); - //FIXME - uart_clk = clk_get_sys("imx-uart.0", NULL); - early_console_setup(MVF_UART0_BASE_ADDR, uart_clk); +#if 1 //FIXME + uart_clk = clk_get_sys("imx-uart.1", NULL); + early_console_setup(MVF_UART1_BASE_ADDR, uart_clk); +#else + uart_clk = clk_get_sys("imx-uart.2", NULL); + early_console_setup(MVF_UART2_BASE_ADDR, uart_clk); +#endif } static struct sys_timer mxc_timer = { diff --git a/arch/arm/mach-mvf/cpu.c b/arch/arm/mach-mvf/cpu.c index d4850657f60c..79ba9c4db1fb 100644 --- a/arch/arm/mach-mvf/cpu.c +++ b/arch/arm/mach-mvf/cpu.c @@ -1,4 +1,6 @@ /* + * based on arch/arm/mach-mx6/cpu.c + * * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -29,17 +31,17 @@ #include <asm/mach/map.h> #include "crm_regs.h" -#include "cpu_op-mx6.h" +#include "cpu_op-mvf.h" -void *mx6_wait_in_iram_base; -void (*mx6_wait_in_iram)(void); -extern void mx6_wait(void); +void *mvf_wait_in_iram_base; +void (*mvf_wait_in_iram)(void); +extern void mvf_wait(void); struct cpu_op *(*get_cpu_op)(int *op); bool enable_wait_mode; -u32 arm_max_freq = CPU_AT_1GHz; +u32 arm_max_freq = CPU_AT_450MHz; void __iomem *gpc_base; void __iomem *ccm_base; @@ -47,9 +49,9 @@ void __iomem *ccm_base; static int cpu_silicon_rev = -1; #define SI_REV_OFFSET 0x48 -static int get_mx6q_srev(void) +static int get_vf6xx_srev(void) { - void __iomem *romcp = ioremap(BOOT_ROM_BASE_ADDR, SZ_8K); + void __iomem *romcp = ioremap(IROM_BASE_ADDR, SZ_8K); u32 rev; if (!romcp) { @@ -61,12 +63,19 @@ static int get_mx6q_srev(void) rev &= 0xff; iounmap(romcp); - if (rev == 0x10) - return IMX_CHIP_REVISION_1_0; - else if (rev == 0x11) - return IMX_CHIP_REVISION_1_1; - else if (rev == 0x20) - return IMX_CHIP_REVISION_2_0; + switch (rev) { + case 0x02: + cpu_silicon_rev = CHIP_REV_1_1; + break; + case 0x10: + break; + case 0x20: + cpu_silicon_rev = CHIP_REV_3_0; + break; + default: + cpu_silicon_rev = CHIP_REV_1_0; + break; + } return 0; } @@ -75,17 +84,17 @@ static int get_mx6q_srev(void) * the silicon revision of the cpu * -EINVAL - not a mx50 */ -int mx6q_revision(void) +int vf6xx_revision(void) { - if (!cpu_is_mx6q()) + if (!cpu_is_vf6xx()) return -EINVAL; if (cpu_silicon_rev == -1) - cpu_silicon_rev = get_mx6q_srev(); + cpu_silicon_rev = get_vf6xx_srev(); return cpu_silicon_rev; } -EXPORT_SYMBOL(mx6q_revision); +EXPORT_SYMBOL(vf6xx_revision); static int __init post_cpu_init(void) { @@ -94,46 +103,72 @@ static int __init post_cpu_init(void) unsigned long iram_paddr, cpaddr; - iram_init(MX6Q_IRAM_BASE_ADDR, MX6Q_IRAM_SIZE); + iram_init(MVF_IRAM0_BASE_ADDR, MVF_IRAM0_SIZE); //FIXME - base = ioremap(AIPS1_ON_BASE_ADDR, PAGE_SIZE); + base = ioremap(AIPS0_ON_BASE_ADDR, PAGE_SIZE); + __raw_writel(0x0, base + 0x20); + __raw_writel(0x0, base + 0x24); + __raw_writel(0x0, base + 0x28); + __raw_writel(0x0, base + 0x2C); __raw_writel(0x0, base + 0x40); __raw_writel(0x0, base + 0x44); __raw_writel(0x0, base + 0x48); __raw_writel(0x0, base + 0x4C); - reg = __raw_readl(base + 0x50) & 0x00FFFFFF; - __raw_writel(reg, base + 0x50); + __raw_writel(0x0, base + 0x50); + __raw_writel(0x0, base + 0x54); + __raw_writel(0x0, base + 0x58); + __raw_writel(0x0, base + 0x5C); + __raw_writel(0x0, base + 0x60); + __raw_writel(0x0, base + 0x64); + __raw_writel(0x0, base + 0x68); + __raw_writel(0x0, base + 0x6C); + reg = __raw_readl(base + 0x80) & 0x00FFFFFF; + __raw_writel(reg, base + 0x80); iounmap(base); base = ioremap(AIPS2_ON_BASE_ADDR, PAGE_SIZE); + __raw_writel(0x0, base + 0x20); + __raw_writel(0x0, base + 0x24); + __raw_writel(0x0, base + 0x28); + __raw_writel(0x0, base + 0x2C); __raw_writel(0x0, base + 0x40); __raw_writel(0x0, base + 0x44); __raw_writel(0x0, base + 0x48); __raw_writel(0x0, base + 0x4C); - reg = __raw_readl(base + 0x50) & 0x00FFFFFF; - __raw_writel(reg, base + 0x50); + __raw_writel(0x0, base + 0x50); + __raw_writel(0x0, base + 0x54); + __raw_writel(0x0, base + 0x58); + __raw_writel(0x0, base + 0x5C); + __raw_writel(0x0, base + 0x60); + __raw_writel(0x0, base + 0x64); + __raw_writel(0x0, base + 0x68); + __raw_writel(0x0, base + 0x6C); + reg = __raw_readl(base + 0x80) & 0x00FFFFFF; + __raw_writel(reg, base + 0x80); iounmap(base); if (enable_wait_mode) { /* Allow SCU_CLK to be disabled when all cores are in WFI*/ - base = IO_ADDRESS(SCU_BASE_ADDR); + base = MVF_IO_ADDRESS(MVF_CA5_SCU_GIC_BASE_ADDR); reg = __raw_readl(base); reg |= 0x20; __raw_writel(reg, base); } +#if 0 //FIXME /* Disable SRC warm reset to work aound system reboot issue */ - base = IO_ADDRESS(SRC_BASE_ADDR); + base = MVF_IO_ADDRESS(MVF_ASRC_BASE_ADDR); reg = __raw_readl(base); reg &= ~0x1; __raw_writel(reg, base); +#endif /* Allocate IRAM for WAIT code. */ /* Move wait routine into iRAM */ cpaddr = (unsigned long)iram_alloc(SZ_4K, &iram_paddr); /* Need to remap the area here since we want the memory region to be executable. */ - mx6_wait_in_iram_base = __arm_ioremap(iram_paddr, SZ_4K, + mvf_wait_in_iram_base = __arm_ioremap(iram_paddr, SZ_4K, MT_MEMORY_NONCACHED); pr_info("cpaddr = %x wait_iram_base=%x\n", (unsigned int)cpaddr, (unsigned int)mx6_wait_in_iram_base); @@ -142,11 +177,11 @@ static int __init post_cpu_init(void) * Need to run the suspend code from IRAM as the DDR needs * to be put into low power mode manually. */ - memcpy((void *)cpaddr, mx6_wait, SZ_4K); - mx6_wait_in_iram = (void *)mx6_wait_in_iram_base; + memcpy((void *)cpaddr, mvf_wait, SZ_4K); + mvf_wait_in_iram = (void *)mvf_wait_in_iram_base; - gpc_base = MX6_IO_ADDRESS(GPC_BASE_ADDR); - ccm_base = MX6_IO_ADDRESS(CCM_BASE_ADDR); + gpc_base = MVF_IO_ADDRESS(MVF_GPC_BASE_ADDR); + ccm_base = MX6_IO_ADDRESS(MVF_CCM_BASE_ADDR); return 0; } @@ -167,14 +202,8 @@ early_param("enable_wait_mode", enable_wait); static int __init arm_core_max(char *p) { - if (memcmp(p, "1200", 4) == 0) { - arm_max_freq = CPU_AT_1_2GHz; - p += 4; - } else if (memcmp(p, "1000", 4) == 0) { - arm_max_freq = CPU_AT_1GHz; - p += 4; - } else if (memcmp(p, "800", 3) == 0) { - arm_max_freq = CPU_AT_800MHz; + if (memcmp(p, "450", 3) == 0) { + arm_max_freq = CPU_AT_1_450MHz; p += 3; } return 0; diff --git a/arch/arm/mach-mvf/cpu_op-mvf.c b/arch/arm/mach-mvf/cpu_op-mvf.c index 8c5dd3e0b556..13a2ce363af3 100644 --- a/arch/arm/mach-mvf/cpu_op-mvf.c +++ b/arch/arm/mach-mvf/cpu_op-mvf.c @@ -1,6 +1,12 @@ /* * based on arch/arm/mach-mx6/cpu_op-mx6.c - * + */ + +/* + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: @@ -27,18 +33,6 @@ static struct cpu_op mvf_cpu_op[] = { //FIXME .cpu_rate = 452000000, .cpu_podf = 0, .cpu_voltage = 1100000,}, -#if 0 - { - .pll_rate = 792000000, - .cpu_rate = 396000000, - .cpu_podf = 1, - .cpu_voltage = 950000,}, - { - .pll_rate = 792000000, - .cpu_rate = 198000000, - .cpu_podf = 3, - .cpu_voltage = 850000,}, -#endif }; #if 0 //FIXME: need dvfs support ? diff --git a/arch/arm/mach-mvf/cpu_op-mvf.h b/arch/arm/mach-mvf/cpu_op-mvf.h index 7fa20d5ba532..e4a1000f74f7 100644 --- a/arch/arm/mach-mvf/cpu_op-mvf.h +++ b/arch/arm/mach-mvf/cpu_op-mvf.h @@ -1,6 +1,12 @@ /* * based on arch/arm/mach-mx6/cpu_op-mx6.h - * + */ + +/* + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: diff --git a/arch/arm/mach-mvf/devices-vf6xx.h b/arch/arm/mach-mvf/devices-mvf.h index 19534fecfc6d..19534fecfc6d 100644 --- a/arch/arm/mach-mvf/devices-vf6xx.h +++ b/arch/arm/mach-mvf/devices-mvf.h diff --git a/arch/arm/mach-mvf/mx6_fec.c b/arch/arm/mach-mvf/mvf_fec.c index b2aa45b3c510..04b3a22df8a9 100644 --- a/arch/arm/mach-mvf/mx6_fec.c +++ b/arch/arm/mach-mvf/mvf_fec.c @@ -1,4 +1,6 @@ /* + * based on arch/arm/mach-mx6/mx6_fec.c + * * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -23,7 +25,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include "devices-imx6q.h" +#include "devices-mvf.h" #define HW_OCOTP_MACn(n) (0x00000620 + (n) * 0x10) |