DCU driver initial support added

10 files changed, 419 insertions, 9 deletions

diff --git a/arch/arm/mach-mvf/board-twr_vf600.c b/arch/arm/mach-mvf/board-twr_vf600.c
index f7ac6863c242..9aa00493d437 100644
--- a/arch/arm/mach-mvf/board-twr_vf600.c
+++ b/arch/arm/mach-mvf/board-twr_vf600.c
@@ -345,6 +345,14 @@ static struct platform_device lpt_device = {
        .resource = lpt_resources,
 };
 
+static struct mvf_dcuv4_platform_data dcuv4_data[] = {
+	{
+	.rev		= 1,
+	}, {
+	.rev		= 1,
+	},
+};
+
 static void twr_vf600_suspend_enter(void)
 {
 	/* suspend preparation */
@@ -388,6 +396,8 @@ static void __init twr_vf600_init(void)
 	vf6xx_add_imx_snvs_rtc();
 	mvf_init_fec(fec_data);
 
+	vf600_add_dcuv4(0, &dcuv4_data[0]);	
+
 	platform_device_register(&edma_device);
 	platform_device_register(&pit_device);
 	platform_device_register(&ftm0_device);
diff --git a/arch/arm/mach-mvf/clock.c b/arch/arm/mach-mvf/clock.c
index 98741aacb05a..aa680c7e854c 100644
--- a/arch/arm/mach-mvf/clock.c
+++ b/arch/arm/mach-mvf/clock.c
@@ -2559,10 +2559,10 @@ static unsigned long _clk_dcu_get_rate(struct clk *clk)
 
 	reg = __raw_readl(MXC_CCM_CSCDR3);
 	if (clk == &dcu0_clk_root)
-		div = ((reg & ~MXC_CCM_CSCDR3_DCU0_DIV_MASK) >>
+		div = ((reg & MXC_CCM_CSCDR3_DCU0_DIV_MASK) >>
 			MXC_CCM_CSCDR3_DCU0_DIV_OFFSET) + 1;
 	else
-		div = ((reg & ~MXC_CCM_CSCDR3_DCU1_DIV_MASK) >>
+		div = ((reg & MXC_CCM_CSCDR3_DCU1_DIV_MASK) >>
 			MXC_CCM_CSCDR3_DCU1_DIV_OFFSET) + 1;
 
 	return clk_get_rate(clk->parent) / div;
@@ -2617,7 +2617,7 @@ static int _clk_dcu_set_parent(struct clk *clk, struct clk *parent)
 
 static struct clk dcu0_clk_root = {
 	__INIT_CLK_DEBUG(dcu0_clk_root)
-	.parent = &pll1_pfd2, //FIXME
+	.parent = &pll3_480_usb1_main_clk,
 	.enable_shift = MXC_CCM_CSCDR3_DCU0_EN_OFFSET,
 	.enable = _clk_dcu_enable,
 	.disable = _clk_dcu_disable,
diff --git a/arch/arm/mach-mvf/devices-mvf.h b/arch/arm/mach-mvf/devices-mvf.h
index 7fa46ca9c8fa..6ee1f8434b02 100644
--- a/arch/arm/mach-mvf/devices-mvf.h
+++ b/arch/arm/mach-mvf/devices-mvf.h
@@ -21,6 +21,9 @@
 #include <mach/mvf.h>
 #include <mach/devices-common.h>
 
+extern const struct mvf_dcuv4_data vf600_dcuv4_data[] __initconst;
+#define vf600_add_dcuv4(id, pdata)	mvf_add_dcuv4(id, &vf600_dcuv4_data[id], pdata)
+
 extern const struct imx_imx_uart_1irq_data mvf_imx_uart_data[] __initconst;
 #define mvf_add_imx_uart(id, pdata)	\
 	imx_add_imx_uart_1irq(&mvf_imx_uart_data[id], pdata)
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
index 3eead8ebda92..500e3267dc19 100755
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/plat-mxc/devices/Kconfig
@@ -169,3 +169,7 @@ config IMX_HAVE_PLATFORM_IMX_MIPI_DSI
 
 config IMX_HAVE_PLATFORM_IMX_MIPI_CSI2
 	bool
+
+config MVF_HAVE_PLATFORM_DCUV4
+	bool
+	default y if ARCH_MVF
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile
index 71cfefa7cccb..64a57a1f7e36 100755
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/plat-mxc/devices/Makefile
@@ -61,3 +61,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI) += platform-imx-hdmi-soc-dai.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC) += platform-imx-asrc.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_DSI) += platform-imx-mipi_dsi.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2) += platform-imx-mipi_csi2.o
+obj-$(CONFIG_MVF_HAVE_PLATFORM_DCUV4) += platform-mvf_dcuv4.o
diff --git a/arch/arm/plat-mxc/devices/platform-mvf_dcuv4.c b/arch/arm/plat-mxc/devices/platform-mvf_dcuv4.c
new file mode 100644
index 000000000000..3e5623624793
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mvf_dcuv4.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <mach/hardware.h>
+#include <mach/devices-common.h>
+#include <linux/clk.h>
+
+#define mvf_dcu4_data_entry_single(soc, id, size, dcu_pg, dcu_blank)	\
+	{								\
+		.iobase = soc ## _DCU ## id ## _BASE_ADDR,			\
+		.irq = soc ## _INT_DCU ## id,				\
+		.iosize = size,						\
+		.pg = dcu_pg,						\
+		.blank = dcu_blank,					\
+	}
+
+#ifdef CONFIG_SOC_VF6XX
+#include <mach/iomux-vmvf.h>
+#include <mach/iomux-vf6xx.h>
+void vf600_dcuv4_pg(int id, int enable)
+{
+	/*TODO; get rid of this and use clock enable?*/
+	//if(enable)
+		//val = readl(MX51_IO_ADDRESS(MX51_SRC_BASE_ADDR));
+		//writel(MXC_PGCR_PCR, MX51_PGC_IPU_PGCR);
+
+}
+
+void vf600_dcuv4_blank(int id, int enable)
+{
+	/*TODO: Add check for which DCU*/
+	/*TODO: Get rid of the backlight enable and use PWM module */
+	if(enable)
+	{
+		if(id == 0)
+		{
+			printk("Blanking \n");
+			//disable pclk
+			mxc_iomux_vmvf_setup_pad(VF6XX_PAD_PAD_110__RGPIOC_GPIO110);
+			//disable backlight
+			mxc_iomux_vmvf_setup_pad((_VF6XX_PAD_PAD_30__RGPIOC_GPIO30 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)));
+		}
+
+	}
+	else
+	{
+		if(id == 0)
+		{
+			printk("UnBlanking \n");
+			//enable pclk
+			mxc_iomux_vmvf_setup_pad(VF6XX_PAD_PAD_110__TCON0_DATA_OUT18);
+			//enable backlight
+			mxc_iomux_vmvf_setup_pad((_VF6XX_PAD_PAD_30__RGPIOC_GPIO30 | MUX_CTRL_PAD(NO_PAD_CTRL)));
+		}
+	}
+}
+
+const struct mvf_dcuv4_data vf600_dcuv4_data[] __initconst = {
+		mvf_dcu4_data_entry_single(MVF, 0, SZ_4M,
+			vf600_dcuv4_pg, vf600_dcuv4_blank),
+		mvf_dcu4_data_entry_single(MVF, 1, SZ_4M,
+			vf600_dcuv4_pg, vf600_dcuv4_blank),
+};
+#endif
+
+struct platform_device *__init mvf_add_dcuv4(
+		const int id,
+		const struct mvf_dcuv4_data *data,
+		struct mvf_dcuv4_platform_data *pdata)
+{
+	struct resource res[] = {
+		{
+			.start = data->iobase,
+			.end = data->iobase + data->iosize - 1,
+			.flags = IORESOURCE_MEM,
+		}, {
+			.start = data->irq,
+			.end = data->irq,
+			.flags = IORESOURCE_IRQ,
+		},
+	};
+
+	pdata->pg = data->pg;
+	pdata->blank = data->blank;
+
+	return imx_add_platform_device_dmamask("mvf-dcuv4", id,
+			res, ARRAY_SIZE(res), pdata, sizeof(*pdata),
+			DMA_BIT_MASK(32));
+}
+
+struct platform_device *__init mvf_add_dcuv4_fb(
+		const int id,
+		const struct dcuv4_fb_platform_data *pdata)
+{
+	if (pdata->res_size[0] > 0) {
+		struct resource res[] = {
+			{
+				.start = pdata->res_base[0],
+				.end = pdata->res_base[0] + pdata->res_size[0] - 1,
+				.flags = IORESOURCE_MEM,
+			}, {
+				.start = 0,
+				.end = 0,
+				.flags = IORESOURCE_MEM,
+			},
+		};
+
+		if (pdata->res_size[1] > 0) {
+			res[1].start = pdata->res_base[1];
+			res[1].end = pdata->res_base[1] +
+					pdata->res_size[1] - 1;
+		}
+
+		return imx_add_platform_device_dmamask("mxc_sdc_fb",
+				id, res, ARRAY_SIZE(res), pdata,
+				sizeof(*pdata), DMA_BIT_MASK(32));
+	} else
+		return imx_add_platform_device_dmamask("mxc_sdc_fb", id,
+				NULL, 0, pdata, sizeof(*pdata),
+				DMA_BIT_MASK(32));
+}
diff --git a/arch/arm/plat-mxc/include/mach/dcu-v4.h b/arch/arm/plat-mxc/include/mach/dcu-v4.h
new file mode 100644
index 000000000000..b0b87eebda1b
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/dcu-v4.h
@@ -0,0 +1,237 @@
+/*
+ * Copyright (c) 2010 Sascha Hauer <s.hauer@pengutronix.de>
+ * Copyright (C) 2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ */
+
+#ifndef __MACH_DCU_V4_H_
+#define __MACH_DCU_V4_H_
+
+#include <linux/ipu.h>
+
+
+typedef struct
+{
+	unsigned enable:1;
+	unsigned tile_en:1;
+	unsigned data_sel:1;
+	unsigned saftey_en:1;
+	unsigned trans:8;
+	unsigned bpp:4;
+	unsigned rle_en:1;
+	unsigned luoffs:11;
+	unsigned bb:1;
+	unsigned ab:2;
+}dcu_layer_cfg_t;
+
+typedef struct
+{
+	unsigned color_r:8;
+	unsigned color_g:8;
+	unsigned color_b:8;
+}dcu_color_t;
+
+/*!
+ * Union of initialization parameters for a logical layer.
+ */
+typedef union {
+
+	struct {
+		uint32_t width;
+		uint32_t height;
+		uint32_t pos_x;
+		uint32_t pos_y;
+		uint32_t addr;
+		dcu_layer_cfg_t layer_cfg;
+		dcu_color_t ckmax;
+		dcu_color_t ckmin;
+		uint32_t tile_ver_size;
+		uint32_t tile_hor_size;
+		uint32_t fg_fcolor;
+		uint32_t fg_bcolor;
+	}layer_mem;
+}dcu_layer_params_t;
+
+/*!
+ * Enumeration of DCU interrupt sources.
+ */
+enum dcu_irq_line {
+	DCU_IRQ_VSYNC = 0,
+	DCU_IRQ_UNDRUN = DCU_IRQ_VSYNC + 1,
+	DCU_IRQ_LS_BF_VS  = DCU_IRQ_VSYNC + 2,
+	DCU_IRQ_VS_BLANK  = DCU_IRQ_VSYNC + 3,
+	DCU_IRQ_CRC_READY  = DCU_IRQ_VSYNC + 4,
+	DCU_IRQ_CRC_OVERFLOW  = DCU_IRQ_VSYNC + 5,
+	DCU_IRQ_P1_FIFO_LO_FLAG  = DCU_IRQ_VSYNC + 6,
+	DCU_IRQ_P1_FIFO_HI_FLAG = DCU_IRQ_VSYNC + 7,
+	DCU_IRQ_P2_FIFO_LO_FLAG = DCU_IRQ_VSYNC + 8,
+	DCU_IRQ_P2_FIFO_HI_FLAG = DCU_IRQ_VSYNC + 9,
+	DCU_IRQ_PROG_END  = DCU_IRQ_VSYNC + 10,
+	/* DCU_IRQ_IPM_ERROR  = DCU_IRQ_VSYNC + 11, */
+	DCU_IRQ_LYR_TRANS_FINISH = DCU_IRQ_VSYNC + 12,
+	DCU_IRQ_DMA_TRANS_FINISH = DCU_IRQ_VSYNC + 14,
+	DCU_IRQ_P3_FIFO_LO_FLAG = DCU_IRQ_VSYNC + 16,
+	DCU_IRQ_P3_FIFO_HI_FLAG = DCU_IRQ_VSYNC + 17,
+	DCU_IRQ_P4_FIFO_LO_FLAG = DCU_IRQ_VSYNC + 18,
+	DCU_IRQ_P4_FIFO_HI_FLAG = DCU_IRQ_VSYNC + 19,
+	DCU_IRQ_P5_FIFO_LO_FLAG = DCU_IRQ_VSYNC + 20,
+	DCU_IRQ_P5_FIFO_HI_FLAG = DCU_IRQ_VSYNC + 21,
+	DCU_IRQ_P6_FIFO_LO_FLAG = DCU_IRQ_VSYNC + 22,
+	DCU_IRQ_P6_FIFO_HI_FLAG = DCU_IRQ_VSYNC + 23,
+	DCU_IRQ_P1_EMPTY = DCU_IRQ_VSYNC + 26,
+	DCU_IRQ_P2_EMPTY = DCU_IRQ_VSYNC + 27,
+	DCU_IRQ_P3_EMPTY = DCU_IRQ_VSYNC + 28,
+	DCU_IRQ_P4_EMPTY = DCU_IRQ_VSYNC + 29,
+	DCU_IRQ_P5_EMPTY = DCU_IRQ_VSYNC + 30,
+	DCU_IRQ_P6_EMPTY = DCU_IRQ_VSYNC + 31,
+	DCU_IRQ_COUNT
+};
+
+enum dcu_mode
+{
+	DCU_OFF = 0,
+	DCU_NORMAL_MODE,
+	DCU_TEST_MODE,
+	DCU_COLOR_BAR_MODE
+};
+
+typedef enum
+{
+	BPP1_CLUT = 0,
+	BPP2_CLUT,
+	BPP4_CLUT,
+	BPP8_CLUT,
+	BPP16_RGB565,
+	BPP24_RGB888,
+	BPP32_ARGB8888,
+	BPP4_TRANSPARENCY_MODE,
+	BPP8_TRANSPARENCY_MODE,
+	BPP4_LUMINANCE_OFFSET_MODE,
+	BPP8_LUMINANCE_OFFSET_MODE,
+	BPP16_ARGB1555,
+	BPP16_ARGB4444,
+	BPP16_APAL8,
+	YCbCr422,
+	BPP_INVALID
+}dcu_bpp_format;
+
+/* TODO: Give users more options */
+typedef enum
+{
+	ALPHA_BLEND_DISABLED = 0,
+	ALPHA_BLEND_ENABLED
+}alpha_aa_config;
+
+/*!
+ * Bitfield of Display Interface signal polarities.
+ */
+typedef struct {
+	unsigned interlaced:1;
+	unsigned data_pol:1;	/* true = inverted */
+	unsigned clk_pol:1;	/* true = rising edge */
+	unsigned Hsync_pol:1;	/* true = active high */
+	unsigned Vsync_pol:1;
+} dcu_di_signal_cfg_t;
+
+
+struct dcu_soc;
+struct dcu_soc *dcu_get_soc(int id);
+
+/* DCU Layer support */
+int32_t dcu_init_layer(struct dcu_soc *dcu, uint8_t layer,
+							uint32_t pixel_fmt,
+							uint16_t width, uint16_t height,
+							dma_addr_t phyaddr_0,
+							int16_t x_pos, int16_t y_pos);
+void dcu_uninit_layer(struct dcu_soc *dcu, uint8_t layer);
+
+int32_t dcu_update_layer_buffer(struct dcu_soc *dcu, uint8_t layer,
+				dma_addr_t phyaddr);
+
+int32_t dcu_set_layer_position(struct dcu_soc *dcu, uint8_t layer, int16_t x_pos,
+				int16_t y_pos);
+
+int32_t dcu_get_layer_position(struct dcu_soc *dcu, uint8_t layer, int16_t *x_pos,
+				int16_t *y_pos);
+
+int32_t dcu_is_layer_enabled(struct dcu_soc *dcu, uint8_t layer);
+
+int32_t dcu_enable_layer(struct dcu_soc *dcu, uint8_t layer);
+
+int32_t dcu_disable_layer(struct dcu_soc *dcu, uint8_t layer, bool wait_for_stop);
+
+int32_t dcu_config_layer_alpha(struct dcu_soc *dcu, uint8_t layer,
+		uint8_t alpha_value, alpha_aa_config aa);
+
+int32_t dcu_set_chroma_keying(struct dcu_soc *dcu, uint8_t layer,
+		dcu_color_t color_max, dcu_color_t color_min, bool enable);
+
+/* DCU IRQ Support */
+void dcu_enable_irq(struct dcu_soc *dcu, uint32_t irq);
+
+void dcu_disable_irq(struct dcu_soc *dcu, uint32_t irq);
+
+void dcu_clear_irq(struct dcu_soc *dcu, uint32_t irq);
+
+bool dcu_get_irq_status(struct dcu_soc *dcu, uint32_t irq);
+
+int dcu_request_irq(struct dcu_soc *dcu, uint32_t irq,
+		    irqreturn_t(*handler) (int, void *),
+		    uint32_t irq_flags, const char *devname, void *dev_id);
+
+void dcu_free_irq(struct dcu_soc *dcu, uint32_t irq, void *dev_id);
+
+/* DCU device driver support */
+int register_dcu_device(struct dcu_soc *dcu, int id);
+
+void unregister_dcu_device(struct dcu_soc *dcu, int id);
+
+/* Display API */
+int32_t dcu_init_panel(struct dcu_soc *dcu, uint32_t pixel_clk,
+			    uint16_t width, uint16_t height,
+			    uint16_t h_start_width, uint16_t h_sync_width,
+			    uint16_t h_end_width, uint16_t v_start_width,
+			    uint16_t v_sync_width, uint16_t v_end_width,
+			    uint32_t v_to_h_sync, dcu_di_signal_cfg_t sig);
+
+void dcu_uninit_panel(struct dcu_soc *dcu);
+
+/* DCU global feature support */
+void dcu_set_bgnd_color(struct dcu_soc *dcu, dcu_color_t color);
+
+
+
+/* Later releases of DCU should support these
+ *
+int32_t dcu_disp_set_gamma_correction(struct dcu_soc *dcu, uint8_t layer, bool enable,
+				int constk[], int slopek[]);
+*/
+
+struct dcuv4_fb_platform_data {
+	char				disp_dev[32];
+	u32				interface_pix_fmt;
+	char				*mode_str;
+	int				default_bpp;
+	int 			dcu_id;
+
+	/* reserved mem */
+	resource_size_t 		res_base[2];
+	resource_size_t 		res_size[2];
+};
+
+struct mvf_dcuv4_platform_data {
+	int rev;
+	void (*pg) (int, int);
+	void (*blank) (int, int);
+};
+
+#endif /* __MACH_DCU_V4_H_ */
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index 2f5f04c39638..b98db656f8f9 100755
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -352,6 +352,23 @@ struct platform_device *__init imx_add_ipuv3_fb(
 		const int id,
 		const struct ipuv3_fb_platform_data *pdata);
 
+#include <mach/dcu-v4.h>
+struct mvf_dcuv4_data {
+	resource_size_t iobase;
+	resource_size_t iosize;
+	resource_size_t irq;
+	void (*pg) (int, int);
+	void (*blank) (int, int);
+};
+struct platform_device *__init mvf_add_dcuv4(
+		const int id,
+		const struct mvf_dcuv4_data *data,
+		struct mvf_dcuv4_platform_data *pdata);
+
+struct platform_device *__init mvf_add_dcuv4_fb(
+		const int id,
+		const struct dcuv4_fb_platform_data *pdata);
+
 #include <mach/mxc_vpu.h>
 struct imx_vpu_data {
 	resource_size_t iobase;
diff --git a/arch/arm/plat-mxc/include/mach/iomux-vf6xx.h b/arch/arm/plat-mxc/include/mach/iomux-vf6xx.h
index f7c5c7620ae2..e1ab00606fcc 100755
--- a/arch/arm/plat-mxc/include/mach/iomux-vf6xx.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-vf6xx.h
@@ -3293,7 +3293,7 @@
 #define VF6XX_PAD_PAD_105__RGPIOC_GPIO105			\
 		(_VF6XX_PAD_PAD_105__RGPIOC_GPIO105 | MUX_CTRL_PAD(NO_PAD_CTRL))	
 #define VF6XX_PAD_PAD_105__TCON0_TCON1			\
-		(_VF6XX_PAD_PAD_105__TCON0_TCON1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE))	/* FIXME */	
+		(_VF6XX_PAD_PAD_105__TCON0_TCON1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE))
 #define VF6XX_PAD_PAD_105__SRC_BMODE1			\
 		(_VF6XX_PAD_PAD_105__SRC_BMODE1 | MUX_CTRL_PAD(NO_PAD_CTRL))	
 #define VF6XX_PAD_PAD_105__LCD_64F6B_LCD0			\
@@ -3304,7 +3304,7 @@
 #define VF6XX_PAD_PAD_106__RGPIOC_GPIO106			\
 		(_VF6XX_PAD_PAD_106__RGPIOC_GPIO106 | MUX_CTRL_PAD(NO_PAD_CTRL))	
 #define VF6XX_PAD_PAD_106__TCON0_TCON2			\
-		(_VF6XX_PAD_PAD_106__TCON0_TCON2 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE))	/* FIXME */	
+		(_VF6XX_PAD_PAD_106__TCON0_TCON2 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE))
 #define VF6XX_PAD_PAD_106__SRC_BMODE0			\
 		(_VF6XX_PAD_PAD_106__SRC_BMODE0 | MUX_CTRL_PAD(NO_PAD_CTRL))	
 #define VF6XX_PAD_PAD_106__LCD_64F6B_LCD1			\
@@ -3315,7 +3315,7 @@
 #define VF6XX_PAD_PAD_107__RGPIOC_GPIO107			\
 		(_VF6XX_PAD_PAD_107__RGPIOC_GPIO107 | MUX_CTRL_PAD(NO_PAD_CTRL))	
 #define VF6XX_PAD_PAD_107__TCON0_DATA_OUT1			\
-		(_VF6XX_PAD_PAD_107__TCON0_DATA_OUT1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE))	
+		(_VF6XX_PAD_PAD_107__TCON0_DATA_OUT1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE))
 #define VF6XX_PAD_PAD_107__LCD_64F6B_LCD2			\
 		(_VF6XX_PAD_PAD_107__LCD_64F6B_LCD2 | MUX_CTRL_PAD(NO_PAD_CTRL))	
 #define VF6XX_PAD_PAD_107__VIU_MUX_DEBUG_OUT31			\
@@ -3333,7 +3333,7 @@
 #define VF6XX_PAD_PAD_109__RGPIOC_GPIO109			\
 		(_VF6XX_PAD_PAD_109__RGPIOC_GPIO109 | MUX_CTRL_PAD(NO_PAD_CTRL))	
 #define VF6XX_PAD_PAD_109__TCON0_TCON3			\
-		(_VF6XX_PAD_PAD_109__TCON0_TCON3 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE))	
+		(_VF6XX_PAD_PAD_109__TCON0_TCON3 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE))
 #define VF6XX_PAD_PAD_109__LCD_64F6B_LCD4			\
 		(_VF6XX_PAD_PAD_109__LCD_64F6B_LCD4 | MUX_CTRL_PAD(NO_PAD_CTRL))	
 #define VF6XX_PAD_PAD_109__VIU_MUX_DEBUG_OUT33			\
diff --git a/arch/arm/plat-mxc/include/mach/mvf.h b/arch/arm/plat-mxc/include/mach/mvf.h
index 66712cae227a..ee8ebf8a69ad 100644
--- a/arch/arm/plat-mxc/include/mach/mvf.h
+++ b/arch/arm/plat-mxc/include/mach/mvf.h
@@ -329,8 +329,8 @@
 #define MXC_INT_DDRMC			58
 #define MXC_INT_SDHC0			59
 #define MXC_INT_SDHC1			60
-#define MXC_INT_DCU0			62
-#define MXC_INT_DCU1			63
+#define MVF_INT_DCU0			62
+#define MVF_INT_DCU1			63
 #define MXC_INT_VIU			64
 #define MXC_INT_GPU			66
 #define MXC_INT_RLE			67