MLK-16989-3 ARM64: dts: imx8mq: remove unused device nodes

The below legacy fbdev related device nodes are not
used anymore:

   a. dcss
   b. lcdif
   c. mipi_dsi
   d. hdmi

So remove them from IMX8MQ platform to make the dts
more clean.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

In 4.14 some patches which moved nodes around were skipped so this
commit was modified to also remove unused nodes from -evk.dts

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>

2 files changed, 0 insertions, 144 deletions

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
index 97480a9ed870..201e1bdf0970 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
@@ -436,21 +436,6 @@
 		};
 	};
 
-	adv7535: adv7535@3d {
-		compatible = "adi,adv7535";
-		reg = <0x3d>;		/* PD pin is low */
-		/* TODO: pin config & irq */
-		video-mode = <16>;	/* 1920x1080@60HZ */
-		dsi-traffic-mode = <0>;
-		bpp = <24>;
-		status = "okay";
-		port {
-			dsi_to_hdmi: endpoint {
-				remote-endpoint = <&mipi_dsi_ep>;
-			};
-		};
-	};
-
 	typec_ptn5100: ptn5110@50 {
 		compatible = "usb,tcpci";
 		pinctrl-names = "default";
@@ -510,11 +495,6 @@
 	};
 };
 
-&hdmi {
-	disp-dev = "hdmi_disp";
-	status = "okay";
-};
-
 &i2c2 {
 	clock-frequency = <100000>;
 	pinctrl-names = "default";
@@ -551,48 +531,6 @@
 	status = "okay";
 };
 
-&lcdif {
-	status = "disabled";
-	disp-dev = "mipi_dsi_northwest";
-	display = <&display0>;
-
-	display0: display@0 {
-		bits-per-pixel = <24>;
-		bus-width = <24>;
-
-		display-timings {
-			native-mode = <&timing0>;
-			timing0: timing0 {
-			clock-frequency = <9200000>;
-			hactive = <480>;
-			vactive = <272>;
-			hfront-porch = <8>;
-			hback-porch = <4>;
-			hsync-len = <41>;
-			vback-porch = <2>;
-			vfront-porch = <4>;
-			vsync-len = <10>;
-
-			hsync-active = <0>;
-			vsync-active = <0>;
-			de-active = <1>;
-			pixelclk-active = <0>;
-			};
-		};
-	};
-};
-
-&mipi_dsi {
-	reset = <&src>;
-	mux-sel = <&gpr>;	/* lcdif or dcss */
-	status = "disabled";
-	port {
-		mipi_dsi_ep: endpoint {
-			remote-endpoint = <&dsi_to_hdmi>;
-		};
-	};
-};
-
 &uart3 { /* BT */
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart3>;
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
index 377562c2487e..bc9627b445ed 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
@@ -459,51 +459,6 @@
 		clock-names = "ipg";
 	};
 
-	dcss: dcss@32e00000 {
-		compatible = "fsl,imx8mq-dcss";
-		reg = <0x0 0x32e00000 0x0 0x25000>,
-		      <0x0 0x32e2f000 0x0 0x1000>;	/* blk_ctl registers */
-		clocks = <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
-			 <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
-			 <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
-			 <&clk IMX8MQ_CLK_DISP_DTRC_DIV>,
-			 <&clk IMX8MQ_CLK_DC_PIXEL_DIV>;
-		clock-names = "axi", "apb", "rtram", "dtrc", "pix";
-		assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL_SRC>;
-		assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>;
-		assigned-clock-rates = <594000000>;
-		interrupt-parent = <&irqsteer_dcss>;
-		interrupts = <3 IRQ_TYPE_LEVEL_HIGH>,	/* dpr1 */
-			     <4 IRQ_TYPE_LEVEL_HIGH>,	/* dpr2 */
-			     <5 IRQ_TYPE_LEVEL_HIGH>,	/* dpr3 */
-			     <6 IRQ_TYPE_LEVEL_HIGH>,	/* ctx_ld */
-			     <7 IRQ_TYPE_LEVEL_HIGH>,	/* rd_src */
-			     <8 IRQ_TYPE_LEVEL_HIGH>,	/* dtg_programmable_1: for vsync */
-			     <15 IRQ_TYPE_LEVEL_HIGH>,	/* dec400d_1 */
-			     <16 IRQ_TYPE_LEVEL_HIGH>,	/* dtrc_2 */
-			     <17 IRQ_TYPE_LEVEL_HIGH>,	/* dtrc_3 */
-			     <18 IRQ_TYPE_LEVEL_HIGH>,	/* lut_ld */
-			     <19 IRQ_TYPE_LEVEL_HIGH>;	/* wr_scl */
-		disp-mode = <16>;			/* <default mode: #16>
-							 * #16: 1920x1080p@60Hz 16:9
-							 */
-		status = "disabled";
-	};
-
-	lcdif: lcdif@30320000 {
-		compatible = "fsl,imx8mq-lcdif", "fsl,imx28-lcdif";
-		reg = <0x0 0x30320000 0x0 0x10000>;
-		clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL_DIV>,
-			 <&clk IMX8MQ_CLK_DUMMY>,
-			 <&clk IMX8MQ_CLK_DUMMY>;
-		clock-names = "pix", "axi", "disp_axi";
-		assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL_SRC>;
-		assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>;
-		assigned-clock-rate = <594000000>;
-		interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
-
 	csi1_bridge: csi1_bridge@30a90000 {
 		compatible = "fsl,imx8mq-csi", "fsl,imx6s-csi";
 		reg = <0x0 0x30a90000 0x0 0x10000>;
@@ -564,30 +519,6 @@
 		status = "disabled";
 	};
 
-	mipi_dsi: mipi_dsi@30A00000 {
-		compatible = "fsl,imx8mq-mipi-dsi";
-		reg = <0x0 0x30a00000 0x0 0x10000>;     /* DSI registers */
-		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clk IMX8MQ_CLK_DSI_CORE_DIV>,
-			 <&clk IMX8MQ_CLK_DSI_PHY_REF_DIV>,
-			 <&clk IMX8MQ_CLK_DSI_DBI_DIV>,
-			 <&clk IMX8MQ_CLK_DSI_AHB_DIV>,
-			 <&clk IMX8MQ_CLK_DSI_IPG_DIV>;
-		clock-names = "core", "phy_ref", "dbi", "rxesc", "txesc";
-		assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF_SRC>,
-				  <&clk IMX8MQ_CLK_DSI_CORE_SRC>,
-				  <&clk IMX8MQ_CLK_DSI_AHB_SRC>;
-		assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
-					 <&clk IMX8MQ_SYS1_PLL_266M>,
-					 <&clk IMX8MQ_SYS1_PLL_80M>;
-		assigned-clock-rate = <594000000>, <266000000>, <80000000>;
-		phy-ref-clkfreq = <27000000>;
-		data-lanes-num = <4>;
-		max-data-rate  = <1500000000>;
-		power-domains = <&mipi_pd>;
-		status = "disabled";
-	};
-
 	dcss_drm: dcss@0x32e00000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -1259,19 +1190,6 @@
 		only-dma-mask32 = <1>;
 	};
 
-	hdmi: hdmi@32c00000 {
-		compatible = "fsl,imx8mq-hdmi";
-		reg = <0x0 0x32c00000 0x0 0x33800>,	/* HDP registers */
-				<0x0 0x32e40000 0x0 0x40000>;   /* HDP SEC register */
-		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-		video-mode = <16>;	/* <default_mode: #16>
-					 * #16: 1920x1080p@60HZ 16:9
-					 * #95: 3840x2160p@30Hz 16:9
-					 * #97: 3840x2160p@60Hz 16:9
-					 */
-		status = "disabled";
-	};
-
 	hdmi_cec: hdmi_cec@32c33800 {
 		compatible = "fsl,imx8-hdp-cec";
 		reg = <0x0 0x32c33800 0x0 0x200>;