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authorSoren Brinkmann <soren.brinkmann@xilinx.com>2012-12-19 10:18:41 -0800
committerMichal Simek <michal.simek@xilinx.com>2013-01-28 13:27:27 +0100
commit03377e5852309edc90acbb03f6e2dfef70c020f2 (patch)
tree55567b058714a662fc97a0c2665464d81bf3a007 /arch
parent7a645976aecab6ee21ce29703a1133dd26a8f216 (diff)
arm: zynq: timer: Fix comment style
Fixing multi line comment style at two locations. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-zynq/timer.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c
index 2b23d0fae934..7b2e04776a54 100644
--- a/arch/arm/mach-zynq/timer.c
+++ b/arch/arm/mach-zynq/timer.c
@@ -36,7 +36,8 @@
#define XTTCPS_CNT_CNTRL_DISABLE_MASK 0x1
-/* Setup the timers to use pre-scaling, using a fixed value for now that will
+/*
+ * Setup the timers to use pre-scaling, using a fixed value for now that will
* work across most input frequency, but it may need to be more dynamic
*/
#define PRESCALE_EXPONENT 11 /* 2 ^ PRESCALE_EXPONENT = PRESCALE */
@@ -89,8 +90,10 @@ static void xttcps_set_interval(struct xttcps_timer *timer,
__raw_writel(cycles, timer->base_addr + XTTCPS_INTR_VAL_OFFSET);
- /* Reset the counter (0x10) so that it starts from 0, one-shot
- mode makes this needed for timing to be right. */
+ /*
+ * Reset the counter (0x10) so that it starts from 0, one-shot
+ * mode makes this needed for timing to be right.
+ */
ctrl_reg |= CNT_CNTRL_RESET;
ctrl_reg &= ~XTTCPS_CNT_CNTRL_DISABLE_MASK;
__raw_writel(ctrl_reg, timer->base_addr + XTTCPS_CNT_CNTRL_OFFSET);