diff options
author | Bitan Biswas <bbiswas@nvidia.com> | 2011-05-12 19:17:53 +0530 |
---|---|---|
committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2011-10-11 07:10:01 -0700 |
commit | 7304266897a867abd479149df8aaa22c467fd1e7 (patch) | |
tree | 2292b1076f89caea1118b49571cd0ac6a0e905be /arch | |
parent | 21d0e2ea4fe547aa44c291cc3d4d073174dcf1eb (diff) |
arm: tegra: irq: fix suspend wake source enable
Changes -
1. interrupt enable register written was read-only. Changed
destination to writable register.
2. all irq were enabled in suspend mode. Disabled interrupts
other than wake sources.
bug 847344
Change-Id: I6f6657f184cb40be5335185e7d901d9d12faaf6b
Reviewed-on: http://git-master/r/53814
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-tegra/legacy_irq.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/legacy_irq.c b/arch/arm/mach-tegra/legacy_irq.c index e05a4aadd867..eba0073e4f02 100644 --- a/arch/arm/mach-tegra/legacy_irq.c +++ b/arch/arm/mach-tegra/legacy_irq.c @@ -151,7 +151,9 @@ void tegra_legacy_irq_set_lp1_wake_mask(void) for (i = 0; i < NUM_ICTLRS; i++) { base = ictlr_reg_base[i]; tegra_legacy_saved_mask[i] = readl(base + ICTLR_CPU_IER); - writel(tegra_legacy_wake_mask[i], base + ICTLR_CPU_IER); + /* clear all interrupt enabled */ + writel(tegra_legacy_saved_mask[i], (base + ICTLR_CPU_IER_CLR)); + writel(tegra_legacy_wake_mask[i], base + ICTLR_CPU_IER_SET); } } @@ -162,7 +164,9 @@ void tegra_legacy_irq_restore_mask(void) for (i = 0; i < NUM_ICTLRS; i++) { base = ictlr_reg_base[i]; - writel(tegra_legacy_saved_mask[i], base + ICTLR_CPU_IER); + /* clear all wake interrupts enabled */ + writel(tegra_legacy_wake_mask[i], (base + ICTLR_CPU_IER_CLR)); + writel(tegra_legacy_saved_mask[i], base + ICTLR_CPU_IER_SET); } } |