diff options
author | Thierry Reding <treding@nvidia.com> | 2017-11-01 15:26:00 +0100 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2017-12-15 10:13:50 +0100 |
commit | 102ca26a62e61e54abf41b3fc51038b4be80f197 (patch) | |
tree | bfab88366882d219b88fdf807e457803c730ed6e /arch | |
parent | 2fdb74fe4e515f35efb91d84e7e85ef2e79293bd (diff) |
arm64: tegra: Fix SD write-protect polarity on Jetson TX2
The write-protect GPIO has an active high polarity.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi index 09f1707539a0..a8baad7b80df 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi @@ -92,7 +92,7 @@ /* SDMMC1 (SD/MMC) */ sdhci@3400000 { cd-gpios = <&gpio TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>; vqmmc-supply = <&vddio_sdmmc1>; }; |