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authorVladimir Barinov <vladimir.barinov@cogentembedded.com>2017-09-14 17:19:13 +0300
committerSimon Horman <horms+renesas@verge.net.au>2017-10-10 09:51:19 +0200
commitba915c12fa1f8a8b9c4b875199b489936ddeccac (patch)
tree7338298b24f0a4457c1afa1ad88a45ab6365aa5c /arch
parentc6c816e22bc89ea4ebfcf04772b4623b573dadc7 (diff)
arm64: dts: ulcb-kf: enable CAN0/1
This supports CAN0/1 on ULCB Kingfisher board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/renesas/ulcb-kf.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
index 885878a4822c..a2cb7363e5ed 100644
--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
@@ -16,6 +16,18 @@
};
};
+&can0 {
+ pinctrl-0 = <&can0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-0 = <&can1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&hscif0 {
pinctrl-0 = <&hscif0_pins>;
pinctrl-names = "default";
@@ -25,6 +37,16 @@
};
&pfc {
+ can0_pins: can0 {
+ groups = "can0_data_a";
+ function = "can0";
+ };
+
+ can1_pins: can1 {
+ groups = "can1_data";
+ function = "can1";
+ };
+
hscif0_pins: hscif0 {
groups = "hscif0_data", "hscif0_ctrl";
function = "hscif0";