diff options
| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2014-09-16 14:11:21 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:17:50 -0600 |
| commit | da985761f851fad9244537d1235e24ddcae40523 (patch) | |
| tree | f8cd5537fd524427ba00afb3fa39b89cfce0d6ff /arch | |
| parent | bcf1d793d84cee3ad6d10bdfed9e584803de0f6f (diff) | |
ENGR00331085-6: ARM: dts: imx6sl-evk: Add spdif support for imx6sl-evk
Complete spdif devicetree binding for imx6sl, also add its support
for imx6sl-evk board.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/imx6sl-evk.dts | 24 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 16 |
2 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index bed72597786d..c3ac2c868b4b 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -112,6 +112,14 @@ mux-ext-port = <3>; hp-det-gpios = <&gpio4 19 1>; }; + + sound-spdif { + compatible = "fsl,imx-audio-spdif", + "fsl,imx6sl-evk-spdif"; + model = "imx-spdif"; + spdif-controller = <&spdif>; + spdif-out; + }; }; &audmux { @@ -429,6 +437,12 @@ >; }; + pinctrl_spdif: spdifgrp { + fsl,pins = < + MX6SL_PAD_SD2_DAT4__SPDIF_OUT 0x80000000 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 @@ -617,6 +631,16 @@ status = "okay"; }; +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdif>; + assigned-clocks = <&clks IMX6SL_CLK_SPDIF0_SEL>, + <&clks IMX6SL_CLK_SPDIF0_PODF>; + assigned-clock-parents = <&clks IMX6SL_CLK_PLL3_PFD3>; + assigned-clock-rates = <0>, <227368421>; + status = "okay"; +}; + &ssi2 { fsl,mode = "i2s-slave"; assigned-clocks = <&clks IMX6SL_CLK_SSI2_SEL>, diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 72f83f76a891..57abef67f694 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -137,8 +137,24 @@ ranges; spdif: spdif@02004000 { + compatible = "fsl,imx6sl-spdif", + "fsl,imx35-spdif"; reg = <0x02004000 0x4000>; interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&sdma 14 18 0>, + <&sdma 15 18 0>; + dma-names = "rx", "tx"; + clocks = <&clks IMX6SL_CLK_SPDIF>, <&clks IMX6SL_CLK_OSC>, + <&clks IMX6SL_CLK_SPDIF>, <&clks IMX6SL_CLK_DUMMY>, + <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_DUMMY>, + <&clks IMX6SL_CLK_IPG>, <&clks IMX6SL_CLK_DUMMY>, + <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_SPBA>; + clock-names = "core", "rxtx0", + "rxtx1", "rxtx2", + "rxtx3", "rxtx4", + "rxtx5", "rxtx6", + "rxtx7", "dma"; + status = "disabled"; }; ecspi1: ecspi@02008000 { |