diff options
author | LCPD Auto Merger <lcpd_integration@list.ti.com> | 2023-01-20 02:21:02 -0600 |
---|---|---|
committer | LCPD Auto Merger <lcpd_integration@list.ti.com> | 2023-01-20 02:21:02 -0600 |
commit | d75f3d9e04652db1736ec4fd156b33d5b44af2c2 (patch) | |
tree | a90696e80bbad4a382b28fdb3bd1253d235c1eae /arch | |
parent | ff7e4a34e09cd3b76ee52d3f7d19d37305154ab9 (diff) | |
parent | 7a581ed05a248199de0e4fa85b65e0299d6a9dd4 (diff) |
Merged TI feature connectivity into ti-linux-5.10.y-cicd
TI-Feature: connectivity
TI-Branch: connectivity-ti-linux-5.10.y
* 'connectivity-ti-linux-5.10.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/connectivity:
ti_config_fragments/connectivity.cfg: Enable XDP
net: ethernet: ti: icssg_prueth: Add AF_XDP support
net: ethernet: ti: icssg_prueth: introduce and use prueth_swdata struct for SWDATA
net: ethernet: ti: icssg_prueth: Use page_pool API for RX buffer allocation
Revert "HACK: arm64: dts: ti: k3-j784s4-evm: Fix boot"
net: ethernet: ti: am65-cpsw/cpts: Fix CPTS release action
net: ethernet: ti: am65-cpsw: Delete unreachable error handling code
arm64: dts: ti: k3-am68-sk: Add DT node for USB
dt-bindings: ti-serdes-mux: Add USB Type C swap defines for J721S2 SoC
arm64: dts: ti: k3-am68-sk-bb-csi2-ov5640: Fix pinmux config for CSI2 refclk
Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 28 | ||||
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-am68-sk-bb-csi2-ov5640.dts | 4 | ||||
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 2 |
3 files changed, 31 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts index 63eb229b1424..37d01cc41f79 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -518,7 +518,7 @@ &serdes_ln_ctrl { idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_PCIE1_LANE1>, - <J721S2_SERDES0_LANE2_IP3_UNUSED>, <J721S2_SERDES0_LANE3_IP4_UNUSED>; + <J721S2_SERDES0_LANE2_USB_SWAP>, <J721S2_SERDES0_LANE3_USB>; }; &serdes_refclk { @@ -533,6 +533,32 @@ cdns,phy-type = <PHY_TYPE_PCIE>; resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; }; + + serdes0_usb_link: phy@2 { + status = "okay"; + reg = <2>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_USB3>; + resets = <&serdes_wiz0 3>; + }; +}; + +&usb_serdes_mux { + idle-states = <0>; /* USB0 to SERDES lane 2 */ +}; + +&usbss0 { + pinctrl-0 = <&main_usbss0_pins_default>; + pinctrl-names = "default"; + ti,vbus-divider; +}; + +&usb0 { + dr_mode = "host"; + maximum-speed = "super-speed"; + phys = <&serdes0_usb_link>; + phy-names = "cdns3,usb3-phy"; }; &pcie1_rc { diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-bb-csi2-ov5640.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-bb-csi2-ov5640.dts index 2afa942fd624..efb6a3b9e7b3 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-bb-csi2-ov5640.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-bb-csi2-ov5640.dts @@ -12,13 +12,15 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/k3.h> -&main_pmx0 { +&wkup_pmx0 { csi2_exp_refclk_pins_default: csi2-exp-refclk-pins-default { pinctrl-single,pins = < J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (F25) WKUP_GPIO0_11.MCU_CLKOUT0 */ >; }; +}; +&main_pmx0 { main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins = < J721S2_IOPAD(0x0ac, PIN_INPUT, 13) /* (AC25) MCASP0_AXR15.I2C1_SCL */ diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index efd548761137..94f87ba97ba3 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -683,7 +683,7 @@ }; &main_cpsw1 { - status = "disabled"; + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_cpsw2g_pins_default &main_cpsw2g_mdio_pins_default>; }; |