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authorSang-Hun Lee <sanlee@nvidia.com>2012-04-16 10:52:09 -0700
committerRohan Somvanshi <rsomvanshi@nvidia.com>2012-04-19 07:39:21 -0700
commit51f83e4e682dc2a0657f74187d53cce6685eb805 (patch)
treed785fab8abb0f56f8b2a1b4d09c20fcd295b0df2 /arch
parentbdd8ce3b99c4ff20dc2f83698c1dc3ae5780fe30 (diff)
Revert "ARM: tegra30: pm: flush L1 data before exit coherency on secondary CPU"
This reverts commit 743c03fbeb5908faf4aef6bee7702a2ad4caac22. Bug 967887 Change-Id: Ie4477e3b5fa9773c9e60b5cace47b3ff240a4bf1 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96785 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/sleep-t3.S12
1 files changed, 1 insertions, 11 deletions
diff --git a/arch/arm/mach-tegra/sleep-t3.S b/arch/arm/mach-tegra/sleep-t3.S
index caabeb751390..6d58585a4903 100644
--- a/arch/arm/mach-tegra/sleep-t3.S
+++ b/arch/arm/mach-tegra/sleep-t3.S
@@ -1,7 +1,7 @@
/*
* arch/arm/mach-tegra/include/mach/sleep-t3.S
*
- * Copyright (c) 2010-2012, NVIDIA Corporation.
+ * Copyright (c) 2010-2011, NVIDIA Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -235,16 +235,6 @@ ENDPROC(tegra3_sleep_core_finish)
*/
ENTRY(tegra3_sleep_cpu_secondary_finish)
mov r6, lr
-
- dsb
-#ifdef MULTI_CACHE
- mov32 r10, cpu_cache
- mov lr, pc
- ldr pc, [r10, #CACHE_FLUSH_KERN_ALL]
-#else
- bl __cpuc_flush_kern_all
-#endif
-
bl tegra_cpu_exit_coherency
/* Powergate this CPU. */