diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2011-02-07 14:24:36 -0600 |
|---|---|---|
| committer | Ranjani Vaidyanathan <ra5478@freescale.com> | 2011-02-07 14:32:10 -0600 |
| commit | 1fcf0b4b0c6e9576b0d23bfb1609b394dd9ae0d0 (patch) | |
| tree | 0dd91b92e9b16f81649f06dc9c407e9ec4d8d3e6 /arch | |
| parent | 83d24772a52ce96222f6da70fb7a2f903e83922b (diff) | |
ENGR00138859-2: MX53-Incorrect CPU frequency when exiting LPAPM mode
CPU frequency was incorrect when exiting from LPAPM mode. The ARM-PODF
divider was not getting set correctly when switching the source of
ARM-Core from PLL2 to PLL1.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mx5/bus_freq.c | 37 |
1 files changed, 22 insertions, 15 deletions
diff --git a/arch/arm/mach-mx5/bus_freq.c b/arch/arm/mach-mx5/bus_freq.c index 349a9319e476..ddcd83f7c5c3 100644 --- a/arch/arm/mach-mx5/bus_freq.c +++ b/arch/arm/mach-mx5/bus_freq.c @@ -324,17 +324,22 @@ void enter_lpapm_mode_mx53() } */ /* move cpu clk to pll2, 400 / 3 = 133Mhz for cpu */ - /* Change the source of pll1_sw_clk to be the step_clk */ - reg = __raw_readl(MXC_CCM_CCSR); - reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL; - __raw_writel(reg, MXC_CCM_CCSR); + /* Change the source of pll1_sw_clk to be the step_clk */ + reg = __raw_readl(MXC_CCM_CCSR); + reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + __raw_writel(reg, MXC_CCM_CCSR); cpu_podf = __raw_readl(MXC_CCM_CACRR); reg = __raw_readl(MXC_CCM_CDHIPR); - if ((reg & MXC_CCM_CDHIPR_ARM_PODF_BUSY) == 0) - __raw_writel(0x2, MXC_CCM_CACRR); - else - printk(KERN_DEBUG "ARM_PODF still in busy!!!!\n"); + while (1) { + if ((reg & MXC_CCM_CDHIPR_ARM_PODF_BUSY) == 0) { + __raw_writel(0x2, MXC_CCM_CACRR); + break; + } else { + reg = __raw_readl(MXC_CCM_CDHIPR); + printk(KERN_DEBUG "ARM_PODF still in busy!!!!\n"); + } + } clk_set_parent(pll1_sw_clk, pll2); /* ahb = pll2/8, axi_b = pll2/8, axi_a = pll2/1*/ @@ -667,13 +672,15 @@ void exit_lpapm_mode_mx53() /* move cpu clk to pll1 */ reg = __raw_readl(MXC_CCM_CDHIPR); - if ((reg & MXC_CCM_CDHIPR_ARM_PODF_BUSY) != 0) - __raw_writel(cpu_podf & 0x7, - MXC_CCM_CACRR); - else - printk(KERN_DEBUG - "ARM_PODF still in busy!!!!\n"); - + while (1) { + if ((reg & MXC_CCM_CDHIPR_ARM_PODF_BUSY) == 0) { + __raw_writel(cpu_podf & 0x7, MXC_CCM_CACRR); + break; + } else { + reg = __raw_readl(MXC_CCM_CDHIPR); + printk(KERN_DEBUG "ARM_PODF still in busy!!!!\n"); + } + } clk_set_parent(pll1_sw_clk, pll1); |