diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2011-02-14 22:45:48 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-03-15 09:29:56 -0500 |
| commit | decbb280bb8e3bceebcf5defb4f61dfbfdb23e18 (patch) | |
| tree | 47d845745196b4a0c76b0206316f3092b3c8da92 /arch | |
| parent | 964a29962c278ddff8a199f23d7c9ef35152a0fe (diff) | |
powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e
If the spin table is located in the linear mapping (which can happen if
we have 4G or more of memory) we need to access the spin table via a
cacheable coherent mapping like we do on ppc32 (and do explicit cache
flush).
See the following commit for the ppc32 version of this issue:
commit d1d47ec6e62ab08d2ebb925fd9203abfad3adfbf
Author: Peter Tyser <ptyser@xes-inc.com>
Date: Fri Dec 18 16:50:37 2009 -0600
powerpc/85xx: Fix SMP when "cpu-release-addr" is in lowmem
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/platforms/85xx/smp.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c index 5c91a992f02b..0d00ff9d05a0 100644 --- a/arch/powerpc/platforms/85xx/smp.c +++ b/arch/powerpc/platforms/85xx/smp.c @@ -91,10 +91,14 @@ smp_85xx_kick_cpu(int nr) while ((__secondary_hold_acknowledge != nr) && (++n < 1000)) mdelay(1); #else + smp_generic_kick_cpu(nr); + out_be64((u64 *)(bptr_vaddr + BOOT_ENTRY_ADDR_UPPER), __pa((u64)*((unsigned long long *) generic_secondary_smp_init))); - smp_generic_kick_cpu(nr); + if (!ioremappable) + flush_dcache_range((ulong)bptr_vaddr, + (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY)); #endif local_irq_restore(flags); |