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authorRalf Baechle <ralf@linux-mips.org>2005-10-01 20:22:39 +0100
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:32:34 +0100
commit65f1f5a2c3cdb0570806fe4e5512945673dfa199 (patch)
tree61772813b74f1b3064a51ba37f36d6093eadeed7 /arch
parent5090dfb5bcf51479370b501e934edadc4d781f67 (diff)
Don't copy SB1 cache error handler to uncached memory.
This may have made sense on a paranoid day with pass 1 BCM1250 processors that were throwing cache error exception left and right for no good reason. On modern silicion that hardly makes sense and the code had gotten just an obscurity ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/mm/c-sb1.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
index b21585980a15..2f08b535f20e 100644
--- a/arch/mips/mm/c-sb1.c
+++ b/arch/mips/mm/c-sb1.c
@@ -503,7 +503,6 @@ void sb1_cache_init(void)
/* Special cache error handler for SB1 */
set_uncached_handler (0x100, &except_vec2_sb1, 0x80);
- memcpy((void *)KSEG1ADDR(&handle_vec2_sb1), &handle_vec2_sb1, 0x80);
probe_cache_sizes();