diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-16 00:09:02 +0100 |
---|---|---|
committer | Ben Hutchings <ben@decadent.org.uk> | 2014-01-03 04:33:15 +0000 |
commit | 5275be6714bfcc5efe8685ecc3b558e9a0371e06 (patch) | |
tree | b249ecae81f95593ee3d9cd92472b1aacd00ce1b /arch | |
parent | e9985b96e1505dda3207b8addac47c3a45a8e776 (diff) |
ARM: sa11x0/assabet: ensure CS2 is configured appropriately
commit f3964fe1c9d9a887d65faf594669852e4dec46e0 upstream.
The CS2 region contains the Assabet board configuration and status
registers, which are 32-bit. Unfortunately, some boot loaders do not
configure this region correctly, leaving it setup as a 16-bit region.
Fix this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-sa1100/assabet.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 3dd133f18415..ef8d9d805e34 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -411,6 +411,9 @@ static void __init assabet_map_io(void) * Its called GPCLKR0 in my SA1110 manual. */ Ser1SDCR0 |= SDCR0_SUS; + MSC1 = (MSC1 & ~0xffff) | + MSC_NonBrst | MSC_32BitStMem | + MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0); if (machine_has_neponset()) { #ifdef CONFIG_ASSABET_NEPONSET |