diff options
| author | Alan Tull <r80115@freescale.com> | 2009-08-05 12:30:49 -0500 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2009-10-13 11:04:58 -0400 |
| commit | f288aaa29d59b4684380836827da718e937ddea8 (patch) | |
| tree | 0f8afd027d19488f759dc2088d59a861209ae380 /arch | |
| parent | 35a351e20d6f63eb4d0d407757bd83273aa67d19 (diff) | |
ENGR00114867 MX51: tristate i2c levelshifter
On Babbage boards there is a collision on the I2C bus between
the audio codec and the dvi port. Reading the EDID from the
DVI leaves the I2C in a funky state, preventing the audio
driver from initializing. The fix for Babbage3.0 boards is to
control the I2C bus level shifter from a GPIO so that the level
shifter is tri-stated by default. When reading the EDID the
level shifter is enabled briefly.
Signed-off-by: Alan Tull <r80115@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mx51/mx51_babbage.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-mx51/mx51_babbage_gpio.c | 9 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-mx51/mx51_babbage.c b/arch/arm/mach-mx51/mx51_babbage.c index 9360fcb604ce..b52093e498ab 100644 --- a/arch/arm/mach-mx51/mx51_babbage.c +++ b/arch/arm/mach-mx51/mx51_babbage.c @@ -263,7 +263,14 @@ static int handle_edid(int *pixclk) memset(&screeninfo, 0, sizeof(screeninfo)); adp = i2c_get_adapter(1); + + if (cpu_is_mx51_rev(CHIP_REV_3_0) > 0) { + mxc_set_gpio_dataout(MX51_PIN_CSI2_HSYNC, 1); + msleep(1); + } err = read_edid(adp, &screeninfo, &dvi); + if (cpu_is_mx51_rev(CHIP_REV_3_0) > 0) + mxc_set_gpio_dataout(MX51_PIN_CSI2_HSYNC, 0); if (!err) { printk(KERN_INFO " EDID read\n"); diff --git a/arch/arm/mach-mx51/mx51_babbage_gpio.c b/arch/arm/mach-mx51/mx51_babbage_gpio.c index 7fd47b54061c..6c8cbb95bbd3 100644 --- a/arch/arm/mach-mx51/mx51_babbage_gpio.c +++ b/arch/arm/mach-mx51/mx51_babbage_gpio.c @@ -653,6 +653,15 @@ void __init mx51_babbage_io_init(void) mxc_set_gpio_direction(MX51_PIN_EIM_A27, 1); } + if (cpu_is_mx51_rev(CHIP_REV_3_0) > 0) { + /* DVI_I2C_ENB = 0 tristates the DVI I2C level shifter */ + mxc_request_iomux(MX51_PIN_CSI2_HSYNC, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX51_PIN_CSI2_HSYNC, PAD_CTL_DRV_HIGH | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_set_gpio_direction(MX51_PIN_CSI2_HSYNC, 0); + mxc_set_gpio_dataout(MX51_PIN_CSI2_HSYNC, 0); + } + /* Deassert VGA reset to free i2c bus */ mxc_set_gpio_direction(MX51_PIN_EIM_A19, 0); mxc_set_gpio_dataout(MX51_PIN_EIM_A19, 1); |