diff options
| author | Fancy Fang <chen.fang@nxp.com> | 2017-08-08 14:20:36 +0800 |
|---|---|---|
| committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
| commit | 898790cb051cf22fad33383a79bcd23bb66f6529 (patch) | |
| tree | 83b2209c9e2d6a6de13f28fab2bb4d5c79a78b97 /arch | |
| parent | a6e6dfdc38af77b3325256cae14cf4e8537d3d77 (diff) | |
MLK-16158-4 ARM64: dts: imx8mq: change dsi phy pll 'max-data-rate' to 1.5GHz
Accoring to the PHY spec, the DSI PHY PLL on imx8mq platform
can support up to 1.5GHz data rate. So change the 'max-data-rate'
to 1.5GHz on imx8mq.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi index 41aee8025ed1..ce9316d3968c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi @@ -382,7 +382,7 @@ assigned-clock-rate = <594000000>, <266000000>, <80000000>; phy-ref-clkfreq = <27000000>; data-lanes-num = <4>; - max-data-rate = <800000000>; + max-data-rate = <1500000000>; power-domains = <&power 0>; status = "disabled"; }; |